Home
last modified time | relevance | path

Searched refs:BMCR_RESET (Results 1 – 11 of 11) sorted by relevance

/external/kernel-headers/original/uapi/linux/
Dmii.h50 #define BMCR_RESET 0x8000 /* Reset to default state */ macro
Dmdio.h79 #define MDIO_CTRL1_RESET BMCR_RESET
/external/syslinux/gpxe/src/include/
Dmii.h53 #define BMCR_RESET 0x8000 /* Reset the DP83840 */ macro
/external/syslinux/gpxe/src/drivers/net/
Db44.c526 err = b44_phy_write(bp, MII_BMCR, BMCR_RESET); in b44_phy_reset()
533 if (val & BMCR_RESET) { in b44_phy_reset()
Dsis190.c468 while ((val & BMCR_RESET) && (cnt < 100)) { in sis190_phy_task()
1087 BMCR_ANENABLE | BMCR_ANRESTART | BMCR_RESET); in sis190_set_speed_auto()
Dforcedeth.c518 miicontrol |= BMCR_RESET; in phy_reset()
527 while (miicontrol & BMCR_RESET) { in phy_reset()
Dtlan.c1440 value = BMCR_LOOPBACK | BMCR_RESET; in TLan_PhyReset()
1443 while (value & BMCR_RESET) { in TLan_PhyReset()
Dr8169.c192 return mdio_read(ioaddr, MII_BMCR) & BMCR_RESET; in rtl8169_xmii_reset_pending()
222 val = mdio_read(ioaddr, MII_BMCR) | BMCR_RESET; in rtl8169_xmii_reset_enable()
Dtg3.c285 phy_control = BMCR_RESET; in tg3_bmcr_reset()
296 if ((phy_control & BMCR_RESET) == 0) { in tg3_bmcr_reset()
1241 tg3_writephy(tp, MII_BMCR, BMCR_RESET); in tg3_setup_fiber_phy()
Dvia-velocity.h1534 #define BMCR_RESET 0x8000 // macro
Dbnx2.c730 bnx2_write_phy(bp, MII_BMCR, BMCR_RESET); in bnx2_reset_phy()
737 if (!(reg & BMCR_RESET)) { in bnx2_reset_phy()