Searched refs:BitN (Results 1 – 11 of 11) sorted by relevance
| /external/llvm/lib/Target/Hexagon/ |
| D | BitTracker.h | 255 const BitValue &operator[](uint16_t BitN) const {
256 assert(BitN < Bits.size());
257 return Bits[BitN];
259 BitValue &operator[](uint16_t BitN) {
260 assert(BitN < Bits.size());
261 return Bits[BitN];
387 RegisterCell eSET(const RegisterCell &A1, uint16_t BitN) const;
388 RegisterCell eCLR(const RegisterCell &A1, uint16_t BitN) const;
|
| D | BitTracker.cpp | 642 uint16_t BitN) const { in eSET()
643 assert(BitN < A1.width()); in eSET()
645 Res[BitN] = BitValue::One; in eSET()
651 uint16_t BitN) const { in eCLR()
652 assert(BitN < A1.width()); in eCLR()
654 Res[BitN] = BitValue::Zero; in eCLR()
|
| D | HexagonGenInsert.cpp | 292 : SelR(R), SelB(B), BitN(N), BitOrd(BO), CM(M) {} in RegisterCellBitCompareSel()
296 const unsigned BitN; member
337 uint16_t Bit1 = (VR1 == SelR) ? SelB : BitN; in operator ()()
338 uint16_t Bit2 = (VR2 == SelR) ? SelB : BitN; in operator ()()
|
| /external/v8/src/arm64/ |
| D | instructions-arm64.cc | 94 int32_t n = BitN(); in ImmLogical()
|
| D | constants-arm64.h | 157 V_(BitN, 22, 22, Bits) \
|
| D | assembler-arm64-inl.h | 1067 Instr Assembler::BitN(unsigned bitn, unsigned reg_size) {
|
| D | assembler-arm64.h | 1772 inline static Instr BitN(unsigned bitn, unsigned reg_size);
|
| D | assembler-arm64.cc | 2396 Emit(SF(rd) | LogicalImmediateFixed | op | BitN(n, reg_size) | in LogicalImmediate()
|
| /external/vixl/src/aarch64/ |
| D | constants-aarch64.h | 87 V_(BitN, 22, 22, ExtractBits) \
|
| D | assembler-aarch64.h | 2740 static Instr BitN(unsigned bitn, unsigned reg_size) { in BitN() function
|
| D | assembler-aarch64.cc | 4052 Emit(SF(rd) | LogicalImmediateFixed | op | BitN(n, reg_size) | in LogicalImmediate()
|