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Searched refs:COND_LT (Results 1 – 11 of 11) sorted by relevance

/external/llvm/lib/Target/AVR/
DAVRInstrInfo.cpp182 case AVRCC::COND_LT: in getBrCond()
214 return AVRCC::COND_LT; in getCondFromBranchOpc()
231 return AVRCC::COND_LT; in getOppositeCondition()
232 case AVRCC::COND_LT: in getOppositeCondition()
DAVRInstrInfo.h36 COND_LT, //!< Less than enumerator
/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/
DMBlazeInstrInfo.h82 COND_LT, enumerator
96 case COND_LT: return MBlaze::BLTID; in GetCondBranchFromCond()
/external/mesa3d/src/mesa/program/
Dprogram_parse_extra.c127 cond = COND_LT; in _mesa_parse_cc()
Dprog_instruction.h98 #define COND_LT 3 /**< less than zero */ macro
Dprog_execute.c424 return COND_LT; in generate_cc()
439 case COND_LT: return (condCode == COND_LT); in test_cc()
441 case COND_LE: return (condCode == COND_LT || condCode == COND_EQ); in test_cc()
Dprog_print.c552 case COND_LT: return "LT"; in _mesa_condcode_string()
Dnvfragparse.c678 dstReg->CondMask = COND_LT; in Parse_CondCodeMask()
/external/mesa3d/src/gallium/drivers/radeon/
DAMDGPUInstructions.td63 def COND_LT : PatLeaf <
DR600Instructions.td1181 (selectcc (f32 R600_Reg32:$src0), R600_Reg32:$src1, FP_ONE, FP_ZERO, COND_LT),
DSIInstructions.td111 [(set VCCReg:$dst, (setcc (f32 AllReg_32:$src0), VReg_32:$src1, COND_LT))]