| /external/llvm/lib/Target/PowerPC/ |
| D | PPCFrameLowering.cpp | 159 {PPC::CR2, -4}, in getCalleeSavedSpillSlots()
1069 if (isSVR4ABI && (PPC::CR2 <= Reg && Reg <= PPC::CR4) in emitPrologue()
1075 if (isSVR4ABI && isPPC64 && (PPC::CR2 <= Reg && Reg <= PPC::CR4)) { in emitPrologue()
1079 unsigned CRReg = isELFv2ABI? Reg : (unsigned) PPC::CR2; in emitPrologue()
1433 (SavedRegs.test(PPC::CR2) || in determineCalleeSaves()
1626 if ((Subtarget.isSVR4ABI() && Reg == PPC::CR2) in processFunctionBeforeFrameFinalized()
1738 bool IsCRField = PPC::CR2 <= Reg && Reg <= PPC::CR4; in spillCalleeSavedRegisters()
1802 MBB.insert(MI, BuildMI(*MF, DL, TII.get(RestoreOp), PPC::CR2) in restoreCRs()
1890 if (Reg == PPC::CR2) { in restoreCalleeSavedRegisters()
1906 && !(PPC::CR2 <= Reg && Reg <= PPC::CR4)) { in restoreCalleeSavedRegisters()
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| D | PPCCallingConv.td | 226 F27, F28, F29, F30, F31, CR2, CR3, CR4
235 F27, F28, F29, F30, F31, CR2, CR3, CR4
244 F27, F28, F29, F30, F31, CR2, CR3, CR4
253 F27, F28, F29, F30, F31, CR2, CR3, CR4
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| D | PPCRegisterInfo.h | 36 Reg = PPC::CR2; in getCRFromCRBit()
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| D | PPCRegisterInfo.td | 196 def CR2 : CR<2, "cr2", [CR2LT, CR2GT, CR2EQ, CR2UN]>, DwarfRegNum<[70, 70]>;
345 CR7, CR2, CR3, CR4)>;
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| D | PPCRegisterInfo.cpp | 732 if (Subtarget.isSVR4ABI() && PPC::CR2 <= Reg && Reg <= PPC::CR4) { in hasReservedSpillSlot()
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/MCTargetDesc/ |
| D | PPCBaseInfo.h | 33 case R2 : case X2 : case F2 : case V2 : case CR2: case CR0EQ: return 2; in getPPCRegisterNumbering()
|
| /external/kernel-headers/original/uapi/asm-generic/ |
| D | termbits.h | 93 #define CR2 0002000 macro
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCRegisterInfo.cpp | 118 PPC::CR2, PPC::CR3, PPC::CR4, in getCalleeSavedRegs()
144 PPC::CR2, PPC::CR3, PPC::CR4, in getCalleeSavedRegs()
172 PPC::CR2, PPC::CR3, PPC::CR4, in getCalleeSavedRegs()
198 PPC::CR2, PPC::CR3, PPC::CR4, in getCalleeSavedRegs()
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| D | PPCRegisterInfo.td | 241 def CR2 : CR<2, "cr2", [CR2LT, CR2GT, CR2EQ, CR2UN]>, DwarfRegNum<[70, 70]>;
317 CR7, CR2, CR3, CR4)> {
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| D | PPCInstrInfo.cpp | 431 Reg = PPC::CR2; in StoreRegToStackSlot()
560 Reg = PPC::CR2; in LoadRegFromStackSlot()
|
| /external/llvm/test/CodeGen/X86/ |
| D | ipra-reg-usage.ll | 6 … DS EFLAGS EIP EIZ ES FPSW FS GS IP RIP RIZ SS BND0 BND1 BND2 BND3 CR0 CR1 CR2 CR3 CR4 CR5 CR6 CR7…
|
| /external/kernel-headers/original/uapi/asm-mips/asm/ |
| D | termbits.h | 113 #define CR2 0002000 macro
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/InstPrinter/ |
| D | PPCInstPrinter.cpp | 181 case PPC::CR2: RegNo = 2; break; in printcrbitm()
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.h | 263 ENTRY(CR2) \
|
| /external/llvm/lib/Target/PowerPC/InstPrinter/ |
| D | PPCInstPrinter.cpp | 363 case PPC::CR2: RegNo = 2; break; in printcrbitm()
|
| /external/llvm/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.h | 357 ENTRY(CR2) \
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/ |
| D | X86MCTargetDesc.cpp | 209 case X86::CR2: case X86::CR10: case X86::DR2: return 2; in getX86RegNum()
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86GenRegisterInfo.inc | 32 CR2 = 13,
261 const unsigned CR2_Overlaps[] = { X86::CR2, 0 };
578 { "CR2", CR2_Overlaps, Empty_SubRegsSet, Empty_SuperRegsSet },
800 …X86::CR0, X86::CR1, X86::CR2, X86::CR3, X86::CR4, X86::CR5, X86::CR6, X86::CR7, X86::CR8, X86::CR9…
1445 RI->mapLLVMRegToDwarfReg(X86::CR2, -1, false );
1606 RI->mapLLVMRegToDwarfReg(X86::CR2, -1, false );
1767 RI->mapLLVMRegToDwarfReg(X86::CR2, -1, false );
1933 RI->mapLLVMRegToDwarfReg(X86::CR2, -1, true );
2094 RI->mapLLVMRegToDwarfReg(X86::CR2, -1, true );
2255 RI->mapLLVMRegToDwarfReg(X86::CR2, -1, true );
[all …]
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| D | X86RegisterInfo.td | 250 def CR2 : Register<"cr2">;
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| /external/llvm/lib/Target/PowerPC/Disassembler/ |
| D | PPCDisassembler.cpp | 66 PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3,
|
| /external/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.td | 286 def CR2 : X86Reg<"cr2", 2>;
|
| /external/mesa3d/src/mesa/x86/ |
| D | assyntax.h | 126 #define CR2 cr2 macro
188 #define CR2 %cr2 macro
|
| /external/libexif/po/ |
| D | ja.po | 229 msgid "CR2"
230 msgstr "CR2"
233 msgid "CR2+JPEG"
234 msgstr "CR2+JPEG"
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| D | be.po | 229 msgid "CR2"
230 msgstr "CR2"
233 msgid "CR2+JPEG"
234 msgstr "CR2+JPEG"
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| D | zh_CN.po | 229 msgid "CR2"
230 msgstr "CR2"
233 msgid "CR2+JPEG"
234 msgstr "CR2+JPEG"
|