| /external/llvm/lib/Target/PowerPC/ |
| D | PPCCallingConv.td | 226 F27, F28, F29, F30, F31, CR2, CR3, CR4
235 F27, F28, F29, F30, F31, CR2, CR3, CR4
244 F27, F28, F29, F30, F31, CR2, CR3, CR4
253 F27, F28, F29, F30, F31, CR2, CR3, CR4
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| D | PPCRegisterInfo.h | 39 Reg = PPC::CR3; in getCRFromCRBit()
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| D | PPCRegisterInfo.td | 197 def CR3 : CR<3, "cr3", [CR3LT, CR3GT, CR3EQ, CR3UN]>, DwarfRegNum<[71, 71]>;
345 CR7, CR2, CR3, CR4)>;
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| D | PPCFrameLowering.cpp | 1434 SavedRegs.test(PPC::CR3) || in determineCalleeSaves()
1806 MBB.insert(MI, BuildMI(*MF, DL, TII.get(RestoreOp), PPC::CR3) in restoreCRs()
1896 } else if (Reg == PPC::CR3) { in restoreCalleeSavedRegisters()
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/MCTargetDesc/ |
| D | PPCBaseInfo.h | 34 case R3 : case X3 : case F3 : case V3 : case CR3: case CR0UN: return 3; in getPPCRegisterNumbering()
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| /external/kernel-headers/original/uapi/asm-generic/ |
| D | termbits.h | 94 #define CR3 0003000 macro
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCRegisterInfo.cpp | 118 PPC::CR2, PPC::CR3, PPC::CR4, in getCalleeSavedRegs()
144 PPC::CR2, PPC::CR3, PPC::CR4, in getCalleeSavedRegs()
172 PPC::CR2, PPC::CR3, PPC::CR4, in getCalleeSavedRegs()
198 PPC::CR2, PPC::CR3, PPC::CR4, in getCalleeSavedRegs()
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| D | PPCRegisterInfo.td | 242 def CR3 : CR<3, "cr3", [CR3LT, CR3GT, CR3EQ, CR3UN]>, DwarfRegNum<[71, 71]>;
317 CR7, CR2, CR3, CR4)> {
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| D | PPCInstrInfo.cpp | 434 Reg = PPC::CR3; in StoreRegToStackSlot()
563 Reg = PPC::CR3; in LoadRegFromStackSlot()
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| /external/llvm/test/CodeGen/X86/ |
| D | ipra-reg-usage.ll | 6 …EFLAGS EIP EIZ ES FPSW FS GS IP RIP RIZ SS BND0 BND1 BND2 BND3 CR0 CR1 CR2 CR3 CR4 CR5 CR6 CR7 CR8…
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| /external/kernel-headers/original/uapi/asm-mips/asm/ |
| D | termbits.h | 114 #define CR3 0003000 macro
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/InstPrinter/ |
| D | PPCInstPrinter.cpp | 182 case PPC::CR3: RegNo = 3; break; in printcrbitm()
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.h | 264 ENTRY(CR3) \
|
| /external/llvm/lib/Target/PowerPC/InstPrinter/ |
| D | PPCInstPrinter.cpp | 364 case PPC::CR3: RegNo = 3; break; in printcrbitm()
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| /external/llvm/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.h | 358 ENTRY(CR3) \
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/ |
| D | X86MCTargetDesc.cpp | 210 case X86::CR3: case X86::CR11: case X86::DR3: return 3; in getX86RegNum()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86GenRegisterInfo.inc | 33 CR3 = 14,
262 const unsigned CR3_Overlaps[] = { X86::CR3, 0 };
579 { "CR3", CR3_Overlaps, Empty_SubRegsSet, Empty_SuperRegsSet },
800 …X86::CR0, X86::CR1, X86::CR2, X86::CR3, X86::CR4, X86::CR5, X86::CR6, X86::CR7, X86::CR8, X86::CR9…
1446 RI->mapLLVMRegToDwarfReg(X86::CR3, -1, false );
1607 RI->mapLLVMRegToDwarfReg(X86::CR3, -1, false );
1768 RI->mapLLVMRegToDwarfReg(X86::CR3, -1, false );
1934 RI->mapLLVMRegToDwarfReg(X86::CR3, -1, true );
2095 RI->mapLLVMRegToDwarfReg(X86::CR3, -1, true );
2256 RI->mapLLVMRegToDwarfReg(X86::CR3, -1, true );
[all …]
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| D | X86RegisterInfo.td | 251 def CR3 : Register<"cr3">;
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| D | X86GenAsmWriter.inc | 6685 case X86::CR3:
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| D | X86GenAsmWriter1.inc | 7428 case X86::CR3:
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| D | X86GenAsmMatcher.inc | 2765 case X86::CR3: OpKind = MCK_CONTROL_REG; break;
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| /external/llvm/lib/Target/PowerPC/Disassembler/ |
| D | PPCDisassembler.cpp | 66 PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3,
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| /external/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.td | 287 def CR3 : X86Reg<"cr3", 3>;
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| /external/mesa3d/src/mesa/x86/ |
| D | assyntax.h | 127 #define CR3 cr3 macro
189 #define CR3 %cr3 macro
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| /external/llvm/lib/Target/PowerPC/AsmParser/ |
| D | PPCAsmParser.cpp | 174 PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3,
|