Searched refs:D8390_P0_RBCR0 (Results 1 – 3 of 3) sorted by relevance
49 outb(cnt, eth_nic_base + D8390_P0_RBCR0); in eth_pio_read()73 outb(cnt, eth_nic_base + D8390_P0_RBCR0); in eth_pio_write()239 outb(0, eth_nic_base+D8390_P0_RBCR0); in ne_reset()
139 outb(cnt, eth_nic_base + D8390_P0_RBCR0);190 outb(cnt, eth_nic_base + D8390_P0_RBCR0); in eth_pio_write()288 outb(0, eth_nic_base+D8390_P0_RBCR0); in ns8390_reset()370 outb(0, eth_nic_base+D8390_P0_RBCR0); /* reset byte counter */ in eth_rx_overrun()
179 #define D8390_P0_RBCR0 0x0A macro