| /external/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.h | 80 EVT getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign, in getOptimalMemOpType() argument
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| /external/swiftshader/third_party/LLVM/lib/Transforms/InstCombine/ |
| D | InstCombineCalls.cpp | 34 unsigned DstAlign = getKnownAlignment(MI->getArgOperand(0), TD); in SimplifyMemTransfer() local
36 unsigned MinAlign = std::min(DstAlign, SrcAlign); in SimplifyMemTransfer()
109 DstAlign = std::max(DstAlign, CopyAlign); in SimplifyMemTransfer()
116 S->setAlignment(DstAlign); in SimplifyMemTransfer()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.h | 93 EVT getOptimalMemOpType(uint64_t Size, unsigned DstAlign,
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| D | SIISelLowering.cpp | 477 EVT SITargetLowering::getOptimalMemOpType(uint64_t Size, unsigned DstAlign, in getOptimalMemOpType() argument
487 if (Size >= 16 && DstAlign >= 4) // XXX: Should only do for global in getOptimalMemOpType()
490 if (Size >= 8 && DstAlign >= 4) in getOptimalMemOpType()
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCISelLowering.h | 363 getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign,
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| D | PPCISelLowering.cpp | 5784 unsigned DstAlign, unsigned SrcAlign, in getOptimalMemOpType() argument
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| /external/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineCalls.cpp | 82 unsigned DstAlign = getKnownAlignment(MI->getArgOperand(0), DL, MI, AC, DT); in SimplifyMemTransfer() local
84 unsigned MinAlign = std::min(DstAlign, SrcAlign); in SimplifyMemTransfer()
157 DstAlign = std::max(DstAlign, CopyAlign); in SimplifyMemTransfer()
166 S->setAlignment(DstAlign); in SimplifyMemTransfer()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.h | 556 EVT getOptimalMemOpType(uint64_t Size, unsigned DstAlign,
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| D | MipsISelLowering.cpp | 3690 EVT MipsTargetLowering::getOptimalMemOpType(uint64_t Size, unsigned DstAlign, in getOptimalMemOpType() argument
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.h | 314 EVT getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign,
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| D | AArch64ISelLowering.cpp | 7238 static bool memOpAlign(unsigned DstAlign, unsigned SrcAlign, in memOpAlign() argument
7241 (DstAlign == 0 || DstAlign % AlignCheck == 0)); in memOpAlign()
7244 EVT AArch64TargetLowering::getOptimalMemOpType(uint64_t Size, unsigned DstAlign, in getOptimalMemOpType() argument
7256 (memOpAlign(SrcAlign, DstAlign, 16) || in getOptimalMemOpType()
7261 (memOpAlign(SrcAlign, DstAlign, 8) || in getOptimalMemOpType()
7266 (memOpAlign(SrcAlign, DstAlign, 4) || in getOptimalMemOpType()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86ISelLowering.h | 546 getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign,
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| D | X86ISelLowering.cpp | 1242 unsigned DstAlign, unsigned SrcAlign, in getOptimalMemOpType() argument
1254 ((DstAlign == 0 || DstAlign >= 16) && in getOptimalMemOpType()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 277 unsigned DstAlign, unsigned SrcAlign,
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| D | ARMISelLowering.cpp | 11136 static bool memOpAlign(unsigned DstAlign, unsigned SrcAlign, in memOpAlign() argument
11139 (DstAlign == 0 || DstAlign % AlignCheck == 0)); in memOpAlign()
11143 unsigned DstAlign, unsigned SrcAlign, in getOptimalMemOpType() argument
11154 (memOpAlign(SrcAlign, DstAlign, 16) || in getOptimalMemOpType()
11158 (memOpAlign(SrcAlign, DstAlign, 8) || in getOptimalMemOpType()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.h | 689 getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign,
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| D | PPCISelLowering.cpp | 11890 unsigned DstAlign, unsigned SrcAlign, in getOptimalMemOpType() argument
11899 (!SrcAlign || SrcAlign >= 32) && (!DstAlign || DstAlign >= 32) && in getOptimalMemOpType()
11907 (((!SrcAlign || SrcAlign >= 16) && (!DstAlign || DstAlign >= 16)) || in getOptimalMemOpType()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 699 EVT getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign,
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAG.cpp | 4185 unsigned DstAlign, unsigned SrcAlign, in FindOptimalMemOpLowering() argument
4193 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && in FindOptimalMemOpLowering()
4202 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, in FindOptimalMemOpLowering()
4207 if (DstAlign >= DAG.getDataLayout().getPointerPrefAlignment(DstAS) || in FindOptimalMemOpLowering()
4208 TLI.allowsMisalignedMemoryAccesses(VT, DstAS, DstAlign)) { in FindOptimalMemOpLowering()
4211 switch (DstAlign & 7) { in FindOptimalMemOpLowering()
4267 TLI.allowsMisalignedMemoryAccesses(VT, DstAS, DstAlign, &Fast) && Fast) in FindOptimalMemOpLowering()
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| /external/llvm/lib/Transforms/Scalar/ |
| D | SROA.cpp | 2832 unsigned DstAlign = SliceAlign; in visitMemTransferInst() local
2835 std::swap(SrcAlign, DstAlign); in visitMemTransferInst()
2866 IRB.CreateAlignedStore(Src, DstPtr, DstAlign, II.isVolatile())); in visitMemTransferInst()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAG.cpp | 3347 unsigned DstAlign, unsigned SrcAlign, in FindOptimalMemOpLowering() argument
3352 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && in FindOptimalMemOpLowering()
3361 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, in FindOptimalMemOpLowering()
3366 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() || in FindOptimalMemOpLowering()
3370 switch (DstAlign & 7) { in FindOptimalMemOpLowering()
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