Searched refs:DstOp (Results 1 – 5 of 5) sorted by relevance
/external/llvm/lib/Target/Hexagon/ |
D | HexagonRDFOpt.cpp | 105 const MachineOperand &DstOp = MI->getOperand(0); in interpretAsCopy() local 108 assert(DstOp.getSubReg() == 0 && "Unexpected subregister"); in interpretAsCopy() 109 mapRegs({ DstOp.getReg(), Hexagon::subreg_hireg }, in interpretAsCopy() 111 mapRegs({ DstOp.getReg(), Hexagon::subreg_loreg }, in interpretAsCopy() 122 const MachineOperand &DstOp = MI->getOperand(0); in interpretAsCopy() local 124 mapRegs({ DstOp.getReg(), DstOp.getSubReg() }, in interpretAsCopy()
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/external/llvm/lib/Target/X86/ |
D | X86MCInstLower.cpp | 1155 static std::string getShuffleComment(const MachineOperand &DstOp, in getShuffleComment() argument 1171 StringRef DstName = DstOp.isReg() ? GetRegisterName(DstOp.getReg()) : "mem"; in getShuffleComment() 1466 const MachineOperand &DstOp = MI->getOperand(0); in EmitInstruction() local 1474 OutStreamer->AddComment(getShuffleComment(DstOp, SrcOp, SrcOp, Mask)); in EmitInstruction() 1488 const MachineOperand &DstOp = MI->getOperand(0); in EmitInstruction() local 1496 OutStreamer->AddComment(getShuffleComment(DstOp, SrcOp, SrcOp, Mask)); in EmitInstruction() 1510 const MachineOperand &DstOp = MI->getOperand(0); in EmitInstruction() local 1518 OutStreamer->AddComment(getShuffleComment(DstOp, SrcOp, SrcOp, Mask)); in EmitInstruction() 1531 const MachineOperand &DstOp = MI->getOperand(0); in EmitInstruction() local 1551 OutStreamer->AddComment(getShuffleComment(DstOp, SrcOp1, SrcOp2, Mask)); in EmitInstruction() [all …]
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/external/llvm/lib/Linker/ |
D | IRMover.cpp | 1049 MDNode *DstOp; in linkModuleFlagsMetadata() local 1051 std::tie(DstOp, DstIndex) = Flags.lookup(ID); in linkModuleFlagsMetadata() 1065 if (!DstOp) { in linkModuleFlagsMetadata() 1073 mdconst::extract<ConstantInt>(DstOp->getOperand(0)); in linkModuleFlagsMetadata() 1080 SrcOp->getOperand(2) != DstOp->getOperand(2)) in linkModuleFlagsMetadata() 1097 Metadata *FlagOps[] = {DstOp->getOperand(0), ID, New}; in linkModuleFlagsMetadata() 1110 if (SrcOp->getOperand(2) != DstOp->getOperand(2)) in linkModuleFlagsMetadata() 1117 if (SrcOp->getOperand(2) != DstOp->getOperand(2)) { in linkModuleFlagsMetadata() 1124 MDNode *DstValue = cast<MDNode>(DstOp->getOperand(2)); in linkModuleFlagsMetadata() 1136 MDNode *DstValue = cast<MDNode>(DstOp->getOperand(2)); in linkModuleFlagsMetadata()
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/external/llvm/lib/Target/AMDGPU/ |
D | R600ExpandSpecialInstrs.cpp | 85 MachineOperand &DstOp = MI.getOperand(DstIdx); in runOnMachineFunction() local 87 DstOp.getReg(), AMDGPU::OQAP); in runOnMachineFunction() 88 DstOp.setReg(AMDGPU::OQAP); in runOnMachineFunction()
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/external/llvm/lib/CodeGen/ |
D | MachineScheduler.cpp | 1604 const MachineOperand &DstOp = Copy->getOperand(0); in constrainLocalCopy() local 1605 unsigned DstReg = DstOp.getReg(); in constrainLocalCopy() 1606 if (!TargetRegisterInfo::isVirtualRegister(DstReg) || DstOp.isDead()) in constrainLocalCopy()
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