| /external/v8/src/compiler/mips64/ |
| D | code-generator-mips64.cc | 452 __ cfc1(kScratchReg, FCSR); \
454 __ ctc1(at, FCSR); \
456 __ ctc1(kScratchReg, FCSR); \
476 __ cfc1(kScratchReg, FCSR); \
478 __ ctc1(at, FCSR); \
480 __ ctc1(kScratchReg, FCSR); \
1587 __ cfc1(tmp_fcsr, FCSR); in AssembleArchInstruction()
1589 __ ctc1(zero_reg, FCSR); in AssembleArchInstruction()
1595 __ cfc1(result, FCSR); in AssembleArchInstruction()
1603 __ ctc1(tmp_fcsr, FCSR); in AssembleArchInstruction()
[all …]
|
| /external/v8/src/compiler/mips/ |
| D | code-generator-mips.cc | 436 __ cfc1(kScratchReg, FCSR); \
438 __ ctc1(at, FCSR); \
440 __ ctc1(kScratchReg, FCSR); \
462 __ cfc1(kScratchReg, FCSR); \
464 __ ctc1(at, FCSR); \
466 __ ctc1(kScratchReg, FCSR); \
|
| /external/v8/src/mips/ |
| D | macro-assembler-mips.cc | 2288 cfc1(scratch, FCSR); in Movt()
2314 cfc1(scratch, FCSR); in Movf()
2560 cfc1(scratch, FCSR); in EmitFPUTruncate()
2562 ctc1(zero_reg, FCSR); in EmitFPUTruncate()
2581 cfc1(except_flag, FCSR); in EmitFPUTruncate()
2583 ctc1(scratch, FCSR); in EmitFPUTruncate()
2602 cfc1(scratch2, FCSR); in TryInlineTruncateDoubleToI()
2603 ctc1(zero_reg, FCSR); in TryInlineTruncateDoubleToI()
2608 cfc1(scratch, FCSR); in TryInlineTruncateDoubleToI()
2609 ctc1(scratch2, FCSR); in TryInlineTruncateDoubleToI()
|
| D | code-stubs-mips.cc | 110 __ cfc1(scratch2, FCSR); in Generate()
111 __ ctc1(zero_reg, FCSR); in Generate()
119 __ cfc1(scratch, FCSR); in Generate()
120 __ ctc1(scratch2, FCSR); in Generate()
|
| D | assembler-mips.h | 310 const FPUControlRegister FCSR = { kFCSRRegister }; variable
|
| /external/v8/src/mips64/ |
| D | macro-assembler-mips64.cc | 2743 cfc1(scratch, FCSR); in EmitFPUTruncate()
2745 ctc1(zero_reg, FCSR); in EmitFPUTruncate()
2764 cfc1(except_flag, FCSR); in EmitFPUTruncate()
2766 ctc1(scratch, FCSR); in EmitFPUTruncate()
2785 cfc1(scratch2, FCSR); in TryInlineTruncateDoubleToI()
2786 ctc1(zero_reg, FCSR); in TryInlineTruncateDoubleToI()
2791 cfc1(scratch, FCSR); in TryInlineTruncateDoubleToI()
2792 ctc1(scratch2, FCSR); in TryInlineTruncateDoubleToI()
|
| D | code-stubs-mips64.cc | 108 __ cfc1(scratch2, FCSR); in Generate()
109 __ ctc1(zero_reg, FCSR); in Generate()
117 __ cfc1(scratch, FCSR); in Generate()
118 __ ctc1(scratch2, FCSR); in Generate()
|
| D | assembler-mips64.h | 312 const FPUControlRegister FCSR = { kFCSRRegister }; variable
|
| /external/valgrind/none/tests/mips32/ |
| D | round.stdout.exp | 386 -------------------------- test FPU Conversion Operations Using the FCSR Rounding Mode ------------…
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| D | round_fpu64.stdout.exp | 1 -------------------------- test FPU Conversion Operations Using the FCSR Rounding Mode ------------…
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| /external/valgrind/memcheck/ |
| D | mc_machine.c | 1100 if (o == GOF(FCSR) && sz == 4) return -1; /* slot unused */ in get_otrack_shadow_offset_wrk()
1188 if (o == GOF(FCSR) && sz == 4) return -1; /* slot unused */ in get_otrack_shadow_offset_wrk()
|
| /external/valgrind/none/tests/mips64/ |
| D | round.stdout.exp | 722 -------------------------- test FPU Conversion Operations Using the FCSR Rounding Mode ------------…
|
| /external/robolectric/v1/lib/main/ |
| D | sqlite-jdbc-3.7.2.jar | META-INF/
META-INF/MANIFEST.MF
META-INF/maven/
META- ... |