| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDGPUInstrInfo.td | 36 def AMDGPUfmax : SDNode<"AMDGPUISD::FMAX", SDTFPBinOp,
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| D | AMDGPUISelLowering.h | 117 FMAX, enumerator
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| D | AMDGPUISelLowering.cpp | 124 return DAG.getNode(AMDGPUISD::FMAX, DL, VT, Op.getOperand(1), in LowerINTRINSIC_WO_CHAIN()
345 NODE_NAME_CASE(FMAX) in getTargetNodeName()
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| /external/llvm/lib/Target/X86/ |
| D | X86IntrinsicsInfo.h | 257 X86_INTRINSIC_DATA(avx_max_pd_256, INTR_TYPE_2OP, X86ISD::FMAX, 0),
258 X86_INTRINSIC_DATA(avx_max_ps_256, INTR_TYPE_2OP, X86ISD::FMAX, 0),
784 X86_INTRINSIC_DATA(avx512_mask_max_pd_128, INTR_TYPE_2OP_MASK, X86ISD::FMAX, 0),
785 X86_INTRINSIC_DATA(avx512_mask_max_pd_256, INTR_TYPE_2OP_MASK, X86ISD::FMAX, 0),
786 X86_INTRINSIC_DATA(avx512_mask_max_pd_512, INTR_TYPE_2OP_MASK, X86ISD::FMAX,
788 X86_INTRINSIC_DATA(avx512_mask_max_ps_128, INTR_TYPE_2OP_MASK, X86ISD::FMAX, 0),
789 X86_INTRINSIC_DATA(avx512_mask_max_ps_256, INTR_TYPE_2OP_MASK, X86ISD::FMAX, 0),
790 X86_INTRINSIC_DATA(avx512_mask_max_ps_512, INTR_TYPE_2OP_MASK, X86ISD::FMAX,
793 X86ISD::FMAX, X86ISD::FMAX_RND),
795 X86ISD::FMAX, X86ISD::FMAX_RND),
[all …]
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| D | X86ISelLowering.h | 244 FMAX, FMIN, enumerator
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| D | X86InstrFragmentsSIMD.td | 45 def X86fmax : SDNode<"X86ISD::FMAX", SDTFPBinOp>;
47 // Commutative and Associative FMIN and FMAX.
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64SchedA57.td | 462 def : InstRW<[A57Write_5cyc_1V], (instregex "^(FMAX|FMIN)(NM)?(v2f32)")>;
464 def : InstRW<[A57Write_5cyc_2V], (instregex "^(FMAX|FMIN)(NM)?(v4f32|v2f64)")>;
466 def : InstRW<[A57Write_5cyc_1V], (instregex "^(FMAX|FMIN)(NM)?P(v2f32|v2i32)")>;
468 def : InstRW<[A57Write_9cyc_3V], (instregex "^(FMAX|FMIN)(NM)?P(v4f32|v2f64|v2i64)")>;
470 def : InstRW<[A57Write_10cyc_3V], (instregex "^(FMAX|FMIN)(NM)?Vv")>;
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| D | AArch64InstrInfo.td | 2610 defm FMAX : TwoOperandFPData<0b0100, "fmax", fmaxnan>;
2955 defm FMAX : SIMDThreeSameVectorFP<0,0,0b110,"fmax", fmaxnan>;
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| /external/v8/src/arm64/ |
| D | constants-arm64.h | 1114 FMAX = FPDataProcessing2SourceFixed | 0x00004000, enumerator
1115 FMAX_s = FMAX,
1116 FMAX_d = FMAX | FP64,
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| D | disasm-arm64.cc | 1030 FORMAT(FMAX, "fmax"); in VisitFPDataProcessing2Source()
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| D | assembler-arm64.cc | 1916 FPDataProcessing2Source(fd, fn, fm, FMAX); in fmax()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelLowering.h | 176 FMAX, enumerator
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| D | ARMISelLowering.cpp | 916 case ARMISD::FMAX: return "ARMISD::FMAX"; in getTargetNodeName()
7830 Opcode = IsReversed ? ARMISD::FMAX : ARMISD::FMIN; in PerformSELECT_CCCombine()
7852 Opcode = IsReversed ? ARMISD::FMIN : ARMISD::FMAX; in PerformSELECT_CCCombine()
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| D | ARMInstrNEON.td | 149 def NEONfmax : SDNode<"ARMISD::FMAX", SDTARMFMAX>;
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| /external/vixl/src/aarch64/ |
| D | constants-aarch64.h | 1210 FMAX = FPDataProcessing2SourceFixed | 0x00004000, enumerator
1211 FMAX_s = FMAX,
1212 FMAX_d = FMAX | FP64,
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| D | disasm-aarch64.cc | 1516 FORMAT(FMAX, "fmax"); in VisitFPDataProcessing2Source()
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| D | assembler-aarch64.cc | 2723 V(fmax, NEON_FMAX, FMAX) \
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86ISelLowering.h | 196 FMAX, FMIN, enumerator
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| D | X86InstrFragmentsSIMD.td | 42 def X86fmax : SDNode<"X86ISD::FMAX", SDTFPBinOp>;
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| D | X86ISelLowering.cpp | 10664 case X86ISD::FMAX: return "X86ISD::FMAX"; in getTargetNodeName()
12694 Opcode = X86ISD::FMAX; in PerformSELECTCombine()
12706 Opcode = X86ISD::FMAX; in PerformSELECTCombine()
12715 Opcode = X86ISD::FMAX; in PerformSELECTCombine()
12756 Opcode = X86ISD::FMAX; in PerformSELECTCombine()
12768 Opcode = X86ISD::FMAX; in PerformSELECTCombine()
12777 Opcode = X86ISD::FMAX; in PerformSELECTCombine()
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| D | X86GenFastISel.inc | 2629 // FastEmit functions for X86ISD::FMAX.
3689 case X86ISD::FMAX: return FastEmit_X86ISD_FMAX_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
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| D | X86GenDAGISel.inc | 39570 /*SwitchOpcode*/ 20|128,3/*404*/, TARGET_VAL(X86ISD::FMAX),// ->82926
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| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 2087 ### FMAX ### subsection
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