Searched refs:FPTieEven (Results 1 – 8 of 8) sorted by relevance
| /external/v8/src/arm64/ |
| D | simulator-arm64.cc | 2296 case FCVTNS_ws: set_wreg(dst, FPToInt32(sreg(src), FPTieEven)); break; in VisitFPIntegerConvert()
2297 case FCVTNS_xs: set_xreg(dst, FPToInt64(sreg(src), FPTieEven)); break; in VisitFPIntegerConvert()
2298 case FCVTNS_wd: set_wreg(dst, FPToInt32(dreg(src), FPTieEven)); break; in VisitFPIntegerConvert()
2299 case FCVTNS_xd: set_xreg(dst, FPToInt64(dreg(src), FPTieEven)); break; in VisitFPIntegerConvert()
2300 case FCVTNU_ws: set_wreg(dst, FPToUInt32(sreg(src), FPTieEven)); break; in VisitFPIntegerConvert()
2301 case FCVTNU_xs: set_xreg(dst, FPToUInt64(sreg(src), FPTieEven)); break; in VisitFPIntegerConvert()
2302 case FCVTNU_wd: set_wreg(dst, FPToUInt32(dreg(src), FPTieEven)); break; in VisitFPIntegerConvert()
2303 case FCVTNU_xd: set_xreg(dst, FPToUInt64(dreg(src), FPTieEven)); break; in VisitFPIntegerConvert()
2514 case FRINTN_s: set_sreg(fd, FPRoundInt(sreg(fn), FPTieEven)); break; in VisitFPDataProcessing1Source()
2515 case FRINTN_d: set_dreg(fd, FPRoundInt(dreg(fn), FPTieEven)); break; in VisitFPDataProcessing1Source()
[all …]
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| D | instructions-arm64.h | 80 FPTieEven = 0x0, enumerator
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| D | simulator-arm64.h | 823 DCHECK(fpcr().RMode() == FPTieEven); // Ties-to-even rounding only.
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| D | macro-assembler-arm64.cc | 1380 STATIC_ASSERT(FPTieEven == 0); in AssertFPCRState()
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| /external/vixl/src/aarch64/ |
| D | simulator-aarch64.cc | 2322 WriteWRegister(dst, FPToInt32(ReadSRegister(src), FPTieEven)); in VisitFPIntegerConvert()
2325 WriteXRegister(dst, FPToInt64(ReadSRegister(src), FPTieEven)); in VisitFPIntegerConvert()
2328 WriteWRegister(dst, FPToInt32(ReadDRegister(src), FPTieEven)); in VisitFPIntegerConvert()
2331 WriteXRegister(dst, FPToInt64(ReadDRegister(src), FPTieEven)); in VisitFPIntegerConvert()
2334 WriteWRegister(dst, FPToUInt32(ReadSRegister(src), FPTieEven)); in VisitFPIntegerConvert()
2337 WriteXRegister(dst, FPToUInt64(ReadSRegister(src), FPTieEven)); in VisitFPIntegerConvert()
2340 WriteWRegister(dst, FPToUInt32(ReadDRegister(src), FPTieEven)); in VisitFPIntegerConvert()
2343 WriteXRegister(dst, FPToUInt64(ReadDRegister(src), FPTieEven)); in VisitFPIntegerConvert()
2654 WriteSRegister(fd, FPToFloat(ReadDRegister(fn), FPTieEven)); in VisitFPDataProcessing1Source()
2657 WriteHRegister(fd, FPToFloat16(ReadSRegister(fn), FPTieEven)); in VisitFPDataProcessing1Source()
[all …]
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| D | logic-aarch64.cc | 246 VIXL_ASSERT(round_mode == FPTieEven); in FPToFloat16()
296 VIXL_ASSERT(round_mode == FPTieEven); in FPToFloat16()
346 VIXL_ASSERT((round_mode == FPTieEven) || (round_mode == FPRoundOdd)); in FPToFloat()
3838 case FPTieEven: { in FPRoundInt()
4545 dst.SetFloat(i, FPToFloat16(src.Float<float>(i), FPTieEven)); in fcvtn()
4550 dst.SetFloat(i, FPToFloat(src.Float<double>(i), FPTieEven)); in fcvtn()
4563 dst.SetFloat(i + lane_count, FPToFloat16(src.Float<float>(i), FPTieEven)); in fcvtn2()
4568 dst.SetFloat(i + lane_count, FPToFloat(src.Float<double>(i), FPTieEven)); in fcvtn2()
4724 case FPTieEven: in FPRecipEstimate()
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| D | simulator-aarch64.h | 77 VIXL_ASSERT((round_mode == FPTieEven) || (round_mode == FPRoundOdd)); in FPRound()
151 if (round_mode == FPTieEven) { in FPRound()
185 if (round_mode == FPTieEven) { in FPRound()
206 if (round_mode == FPTieEven) { in FPRound()
3032 VIXL_ASSERT(ReadFpcr().GetRMode() == FPTieEven);
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| D | instructions-aarch64.h | 145 FPTieEven = 0x0, enumerator
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