Searched refs:FP_ROUND_INREG (Results 1 – 19 of 19) sorted by relevance
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 413 FP_ROUND_INREG, enumerator
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 477 FP_ROUND_INREG, enumerator
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDILISelLowering.cpp | 130 setOperationAction(ISD::FP_ROUND_INREG, VT, Expand); in InitAMDILLowering()
192 setOperationAction(ISD::FP_ROUND_INREG, MVT::v2f64, Expand); in InitAMDILLowering()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 192 case ISD::FP_ROUND_INREG: in LegalizeOp()
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| D | LegalizeVectorTypes.cpp | 56 case ISD::FP_ROUND_INREG: R = ScalarizeVecRes_InregOp(N); break; in ScalarizeVectorResult()
427 case ISD::FP_ROUND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break; in SplitVectorResult()
1237 case ISD::FP_ROUND_INREG: Res = WidenVecRes_InregOp(N); break; in WidenVectorResult()
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| D | SelectionDAG.cpp | 2791 case ISD::FP_ROUND_INREG: { in getNode()
3016 case ISD::FP_ROUND_INREG: in getNode()
6038 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; in getOperationName()
6463 case ISD::FP_ROUND_INREG: { in UnrollVectorOp()
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| D | LegalizeFloatTypes.cpp | 1360 SDValue Res = DAG.getNode(ISD::FP_ROUND_INREG, dl, MVT::ppcf128, in ExpandFloatOp_FP_TO_SINT()
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| D | LegalizeDAG.cpp | 811 case ISD::FP_ROUND_INREG: in LegalizeOp()
3121 case ISD::FP_ROUND_INREG: { in ExpandNode()
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| D | DAGCombiner.cpp | 1097 case ISD::FP_ROUND_INREG: return visitFP_ROUND_INREG(N); in visit()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 251 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; in getOperationName()
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| D | LegalizeVectorOps.cpp | 337 case ISD::FP_ROUND_INREG: in LegalizeOp()
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| D | LegalizeVectorTypes.cpp | 57 case ISD::FP_ROUND_INREG: R = ScalarizeVecRes_InregOp(N); break; in ScalarizeVectorResult()
599 case ISD::FP_ROUND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break; in SplitVectorResult()
2063 case ISD::FP_ROUND_INREG: Res = WidenVecRes_InregOp(N); break; in WidenVectorResult()
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| D | SelectionDAG.cpp | 3594 case ISD::FP_ROUND_INREG: { in getNode()
3842 case ISD::FP_ROUND_INREG: in getNode()
6943 case ISD::FP_ROUND_INREG: { in UnrollVectorOp()
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| D | LegalizeDAG.cpp | 970 case ISD::FP_ROUND_INREG: in LegalizeOp()
2913 case ISD::FP_ROUND_INREG: { in ExpandNode()
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| D | LegalizeFloatTypes.cpp | 1612 SDValue Res = DAG.getNode(ISD::FP_ROUND_INREG, dl, MVT::ppcf128, in ExpandFloatOp_FP_TO_SINT()
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| D | DAGCombiner.cpp | 1417 case ISD::FP_ROUND_INREG: return visitFP_ROUND_INREG(N); in visit()
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 105 setOperationAction(ISD::FP_ROUND_INREG, MVT::ppcf128, Custom); in PPCTargetLowering()
4579 case ISD::FP_ROUND_INREG: { in ReplaceNodeResults()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 146 setOperationAction(ISD::FP_ROUND_INREG, MVT::ppcf128, Custom); in PPCTargetLowering()
705 setOperationAction(ISD::FP_ROUND_INREG , MVT::v4f32, Expand); in PPCTargetLowering()
8355 case ISD::FP_ROUND_INREG: { in ReplaceNodeResults()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 376 setOperationAction(ISD::FP_ROUND_INREG , MVT::f32 , Expand); in X86TargetLowering()
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