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Searched refs:FSUB (Results 1 – 25 of 99) sorted by relevance

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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DLegalizeVectorOps.cpp147 case ISD::FSUB: in LegalizeOp()
340 if (TLI.isOperationLegalOrCustom(ISD::FSUB, Op.getValueType())) { in ExpandFNEG()
342 return DAG.getNode(ISD::FSUB, Op.getDebugLoc(), Op.getValueType(), in ExpandFNEG()
DSelectionDAGBuilder.cpp2548 visitBinary(I, ISD::FSUB); in visitFSub()
3633 SDValue X = DAG.getNode(ISD::FSUB, dl, MVT::f32, t0, t1); in visitExp()
3771 SDValue LogOfMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2, in visitLog()
3791 SDValue t3 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2, in visitLog()
3797 SDValue LogOfMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t6, in visitLog()
3819 SDValue t3 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2, in visitLog()
3825 SDValue t7 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t6, in visitLog()
3831 SDValue LogOfMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t10, in visitLog()
3879 SDValue Log2ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2, in visitLog2()
3899 SDValue t3 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2, in visitLog2()
[all …]
DLegalizeFloatTypes.cpp91 case ISD::FSUB: R = SoftenFloatRes_FSUB(N); break; in SoftenFloatResult()
871 case ISD::FSUB: ExpandFloatRes_FSUB(N, Lo, Hi); break; in ExpandFloatResult()
1389 DAG.getNode(ISD::FSUB, dl, in ExpandFloatOp_FP_TO_UINT()
/external/javassist/src/main/javassist/bytecode/
DOpcode.java110 int FSUB = 102; field
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DISDOpcodes.h235 FADD, FSUB, FMUL, FMA, FDIV, FREM, enumerator
/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h241 FADD, FSUB, FMUL, FDIV, FREM, enumerator
/external/valgrind/none/tests/ppc64/
Dround.c32 FADD, FSUB, FMUL, FDIV, FMADD, enumerator
956 case FSUB: in check_double_guarded_arithmetic_op()
1111 case FSUB: in check_double_guarded_arithmetic_op()
/external/valgrind/none/tests/ppc32/
Dround.c32 FADD, FSUB, FMUL, FDIV, FMADD, enumerator
956 case FSUB: in check_double_guarded_arithmetic_op()
1111 case FSUB: in check_double_guarded_arithmetic_op()
/external/llvm/lib/Target/AMDGPU/
DAMDGPUTargetTransformInfo.cpp165 case ISD::FSUB: in getArithmeticInstrCost()
DAMDGPUISelLowering.cpp263 setOperationAction(ISD::FSUB, MVT::f64, Expand); in AMDGPUTargetLowering()
426 setOperationAction(ISD::FSUB, VT, Expand); in AMDGPUTargetLowering()
484 setTargetDAGCombine(ISD::FSUB); in AMDGPUTargetLowering()
1600 return DAG.getNode(ISD::FSUB, SL, VT, X, Mul); in LowerFREM()
1705 SDValue Tmp2 = DAG.getNode(ISD::FSUB, SL, MVT::f64, Tmp1, CopySign); in LowerFRINT()
1735 SDValue Diff = DAG.getNode(ISD::FSUB, SL, MVT::f32, X, T); in LowerFROUND32()
/external/v8/src/arm64/
Dconstants-arm64.h1111 FSUB = FPDataProcessing2SourceFixed | 0x00003000, enumerator
1112 FSUB_s = FSUB,
1113 FSUB_d = FSUB | FP64,
/external/v8/src/ppc/
Dconstants-ppc.h272 FSUB = 20 << 1, // Floating Subtract enumerator
Ddisasm-ppc.cc918 case FSUB: { in DecodeExt4()
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeVectorOps.cpp272 case ISD::FSUB: in LegalizeOp()
1020 if (TLI.isOperationLegalOrCustom(ISD::FSUB, Op.getValueType())) { in ExpandFNEG()
1024 return DAG.getNode(ISD::FSUB, DL, Op.getValueType(), in ExpandFNEG()
DSelectionDAGBuilder.cpp2464 visitBinary(I, ISD::FSUB); in visitFSub()
4164 SDValue X = DAG.getNode(ISD::FSUB, dl, MVT::f32, t0, t1); in getLimitedPrecisionExp2()
4302 LogOfMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2, in expandLog()
4319 SDValue t3 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2, in expandLog()
4325 LogOfMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t6, in expandLog()
4344 SDValue t3 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2, in expandLog()
4350 SDValue t7 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t6, in expandLog()
4356 LogOfMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t10, in expandLog()
4399 Log2ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2, in expandLog2()
4416 SDValue t3 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2, in expandLog2()
[all …]
DSelectionDAGDumper.cpp197 case ISD::FSUB: return "fsub"; in getOperationName()
/external/llvm/lib/Target/X86/
DX86IntrinsicsInfo.h1441 X86_INTRINSIC_DATA(avx512_mask_sub_pd_128, INTR_TYPE_2OP_MASK, ISD::FSUB, 0),
1442 X86_INTRINSIC_DATA(avx512_mask_sub_pd_256, INTR_TYPE_2OP_MASK, ISD::FSUB, 0),
1443 X86_INTRINSIC_DATA(avx512_mask_sub_pd_512, INTR_TYPE_2OP_MASK, ISD::FSUB,
1445 X86_INTRINSIC_DATA(avx512_mask_sub_ps_128, INTR_TYPE_2OP_MASK, ISD::FSUB, 0),
1446 X86_INTRINSIC_DATA(avx512_mask_sub_ps_256, INTR_TYPE_2OP_MASK, ISD::FSUB, 0),
1447 X86_INTRINSIC_DATA(avx512_mask_sub_ps_512, INTR_TYPE_2OP_MASK, ISD::FSUB,
1449 X86_INTRINSIC_DATA(avx512_mask_sub_sd_round, INTR_TYPE_SCALAR_MASK_RM, ISD::FSUB,
1451 X86_INTRINSIC_DATA(avx512_mask_sub_ss_round, INTR_TYPE_SCALAR_MASK_RM, ISD::FSUB,
/external/jacoco/org.jacoco.core.test/src/org/jacoco/core/internal/flow/
DLabelFlowAnalyzerTest.java194 testInsn(FSUB, true); in testInsn()
/external/mesa3d/src/gallium/drivers/radeon/
DAMDGPUISelLowering.cpp168 SDValue OneSubA = DAG.getNode(ISD::FSUB, DL, VT, in LowerIntrinsicLRP()
DR600ISelLowering.cpp38 setOperationAction(ISD::FSUB, MVT::f32, Expand); in R600TargetLowering()
/external/javassist/src/main/javassist/compiler/
DCodeGen.java935 '-', DSUB, FSUB, LSUB, ISUB,
1730 bytecode.addOpcode(token == PLUSPLUS ? FADD : FSUB); in atPlusPlus()
1808 bytecode.addOpcode(token == PLUSPLUS ? FADD : FSUB); in atPlusPlusCore()
/external/owasp/sanitizer/tools/findbugs/lib/
Dasm-3.3.jarMETA-INF/MANIFEST.MF org/objectweb/asm/AnnotationVisitor.class <Unknown> ...
/external/jarjar/lib/
Dasm-4.0.jarMETA-INF/MANIFEST.MF org/objectweb/asm/AnnotationVisitor.class <Unknown> ...
/external/vixl/src/aarch64/
Dconstants-aarch64.h1207 FSUB = FPDataProcessing2SourceFixed | 0x00003000, enumerator
1208 FSUB_s = FSUB,
1209 FSUB_d = FSUB | FP64,
/external/guice/lib/build/
Dasm-5.0.3.jarMETA-INF/MANIFEST.MF org/ org/objectweb/ org/objectweb/asm/ ...

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