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Searched refs:Fcvtzu (Results 1 – 6 of 6) sorted by relevance

/external/v8/src/compiler/arm64/
Dcode-generator-arm64.cc1407 __ Fcvtzu(i.OutputRegister32(), i.InputFloat32Register(0)); in AssembleArchInstruction() local
1414 __ Fcvtzu(i.OutputRegister32(), i.InputDoubleRegister(0)); in AssembleArchInstruction() local
1446 __ Fcvtzu(i.OutputRegister64(), i.InputFloat32Register(0)); in AssembleArchInstruction() local
1454 __ Fcvtzu(i.OutputRegister64(), i.InputDoubleRegister(0)); in AssembleArchInstruction() local
/external/vixl/test/aarch64/
Dtest-assembler-aarch64.cc12596 __ Fcvtzu(w0, s0); in TEST() local
12597 __ Fcvtzu(w1, s1); in TEST() local
12598 __ Fcvtzu(w2, s2); in TEST() local
12599 __ Fcvtzu(w3, s3); in TEST() local
12600 __ Fcvtzu(w4, s4); in TEST() local
12601 __ Fcvtzu(w5, s5); in TEST() local
12602 __ Fcvtzu(w6, s6); in TEST() local
12603 __ Fcvtzu(w7, s7); in TEST() local
12604 __ Fcvtzu(w8, d8); in TEST() local
12605 __ Fcvtzu(w9, d9); in TEST() local
[all …]
Dtest-disasm-aarch64.cc6145 COMPARE_MACRO(Fcvtzu(v4.V2S(), v11.V2S()), in TEST()
6148 COMPARE_MACRO(Fcvtzu(v23.V4S(), v12.V4S()), in TEST()
6151 COMPARE_MACRO(Fcvtzu(v30.V2D(), v1.V2D()), in TEST()
6188 COMPARE_MACRO(Fcvtzu(s28, s29), "fcvtzu s28, s29"); in TEST()
6189 COMPARE_MACRO(Fcvtzu(d30, d31), "fcvtzu d30, d31"); in TEST()
6680 COMPARE_MACRO(Fcvtzu(v5.V2S(), v3.V2S(), 11), "fcvtzu v5.2s, v3.2s, #11"); in TEST()
6681 COMPARE_MACRO(Fcvtzu(v6.V4S(), v4.V4S(), 12), "fcvtzu v6.4s, v4.4s, #12"); in TEST()
6682 COMPARE_MACRO(Fcvtzu(v7.V2D(), v5.V2D(), 33), "fcvtzu v7.2d, v5.2d, #33"); in TEST()
6683 COMPARE_MACRO(Fcvtzu(s8, s6, 13), "fcvtzu s8, s6, #13"); in TEST()
6684 COMPARE_MACRO(Fcvtzu(d8, d6, 34), "fcvtzu d8, d6, #34"); in TEST()
/external/v8/src/arm64/
Dmacro-assembler-arm64-inl.h664 void MacroAssembler::Fcvtzu(const Register& rd, const FPRegister& fn) { in Fcvtzu() function
Dmacro-assembler-arm64.h416 inline void Fcvtzu(const Register& rd, const FPRegister& fn);
/external/vixl/src/aarch64/
Dmacro-assembler-aarch64.h1276 void Fcvtzu(const Register& rd, const VRegister& vn, int fbits = 0) {
2675 void Fcvtzu(const VRegister& vd, const VRegister& vn, int fbits = 0) {