/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | Thumb1FrameLowering.cpp | 61 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitPrologue() local 93 if (Reg == FramePtr) in emitPrologue() 102 if (Reg == FramePtr) in emitPrologue() 136 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr) in emitPrologue() 218 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitEpilogue() local 246 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes, in emitEpilogue() 254 .addReg(FramePtr)); in emitEpilogue()
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D | ARMFrameLowering.cpp | 137 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitPrologue() local 169 if (Reg == FramePtr) in emitPrologue() 178 if (Reg == FramePtr) in emitPrologue() 206 BuildMI(MBB, MBBI, dl, TII.get(ADDriOpc), FramePtr) in emitPrologue() 333 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitEpilogue() local 364 emitARMRegPlusImmediate(MBB, MBBI, dl, ARM::SP, FramePtr, -NumBytes, in emitEpilogue() 376 emitT2RegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes, in emitEpilogue() 386 .addReg(FramePtr).addImm((unsigned)ARMCC::AL).addReg(0).addReg(0); in emitEpilogue() 390 .addReg(FramePtr)); in emitEpilogue() 874 unsigned FramePtr = RegInfo->getFrameRegister(MF); in processFunctionBeforeCalleeSavedScan() local [all …]
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D | ARMBaseRegisterInfo.cpp | 60 FramePtr((STI.isTargetDarwin() || STI.isThumb()) ? ARM::R7 : ARM::R11), in ARMBaseRegisterInfo() 111 Reserved.set(FramePtr); in getReservedRegs() 141 if (FramePtr == Reg && TFI->hasFP(MF)) in isReservedReg() 512 } else if (FramePtr == ARM::R7) { in getRawAllocationOrder() 534 } else if (FramePtr == ARM::R7) { in getRawAllocationOrder() 676 return FramePtr; in getFrameRegister()
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D | ARMBaseRegisterInfo.h | 81 unsigned FramePtr; variable
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D | ARMExpandPseudoInsts.cpp | 822 unsigned FramePtr = RI.getFrameRegister(MF); in ExpandMI() local 828 FramePtr, -NumBytes, ARMCC::AL, 0, *TII); in ExpandMI() 831 FramePtr, -NumBytes, *TII, RI); in ExpandMI() 834 FramePtr, -NumBytes, ARMCC::AL, 0, in ExpandMI()
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D | ARMAsmPrinter.cpp | 1056 unsigned FramePtr = RegInfo->getFrameRegister(MF); in EmitUnwindingInstruction() local 1150 if (DstReg == FramePtr && FramePtr != ARM::SP) in EmitUnwindingInstruction() 1153 OutStreamer.EmitSetFP(FramePtr, ARM::SP, -Offset); in EmitUnwindingInstruction()
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D | ARMISelLowering.cpp | 5519 unsigned FramePtr = RI.getFrameRegister(MF); in EmitBasePointerRecalculation() local 5525 FramePtr, -NumBytes, ARMCC::AL, 0, *AII); in EmitBasePointerRecalculation() 5528 FramePtr, -NumBytes, *AII, RI); in EmitBasePointerRecalculation() 5531 FramePtr, -NumBytes, ARMCC::AL, 0, *AII); in EmitBasePointerRecalculation()
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/external/llvm/lib/Target/X86/ |
D | X86RegisterInfo.cpp | 71 FramePtr = Use64BitReg ? X86::RBP : X86::EBP; in X86RegisterInfo() 76 FramePtr = X86::EBP; in X86RegisterInfo() 557 if (!MRI->canReserveReg(FramePtr)) in canRealignStack() 589 BasePtr = (FrameIndex < 0 ? FramePtr : getBaseRegister()); in eliminateFrameIndex() 591 BasePtr = (FrameIndex < 0 ? FramePtr : StackPtr); in eliminateFrameIndex() 595 BasePtr = (TFI->hasFP(MF) ? FramePtr : StackPtr); in eliminateFrameIndex() 636 assert(BasePtr == FramePtr && "Expected the FP as base register"); in eliminateFrameIndex() 659 return TFI->hasFP(MF) ? FramePtr : StackPtr; in getFrameRegister()
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D | X86FrameLowering.cpp | 931 unsigned FramePtr = TRI->getFrameRegister(MF); in emitPrologue() local 934 ? getX86SubSuperRegister(FramePtr, 64) : FramePtr; in emitPrologue() 1065 .addImm(FramePtr) in emitPrologue() 1073 FramePtr) in emitPrologue() 1252 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::LEA64r), FramePtr), in emitPrologue() 1255 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rr), FramePtr) in emitPrologue() 1261 .addImm(FramePtr) in emitPrologue() 1351 FramePtr, true, X86FI->getRestoreBasePointerOffset()) in emitPrologue() 1367 .addReg(FramePtr) in emitPrologue() 1489 unsigned FramePtr = TRI->getFrameRegister(MF); in emitEpilogue() local [all …]
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D | X86RegisterInfo.h | 45 unsigned FramePtr; variable
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/external/llvm/lib/Target/Sparc/ |
D | SparcRegisterInfo.cpp | 110 unsigned FIOperandNum, int Offset, unsigned FramePtr) { in replaceFI() argument 115 MI.getOperand(FIOperandNum).ChangeToRegister(FramePtr, false); in replaceFI() 135 .addReg(FramePtr); in replaceFI() 153 .addReg(FramePtr); in replaceFI()
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86FrameLowering.cpp | 288 unsigned FramePtr) const { in emitCalleeSavedFrameMoves() 341 if (HasFP && FramePtr == Reg) in emitCalleeSavedFrameMoves() 466 unsigned FramePtr = RegInfo->getFrameRegister(MF); in getCompactUnwindEncoding() local 516 if (DstReg != FramePtr || SrcReg != StackPtr) in getCompactUnwindEncoding() 613 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitPrologue() local 698 .addReg(FramePtr, RegState::Kill) in emitPrologue() 720 MachineLocation FPSrc(FramePtr); in emitPrologue() 726 TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr), FramePtr) in emitPrologue() 737 MachineLocation FPDst(FramePtr); in emitPrologue() 745 I->addLiveIn(FramePtr); in emitPrologue() [all …]
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D | X86FrameLowering.h | 37 unsigned FramePtr) const;
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D | X86RegisterInfo.h | 51 unsigned FramePtr; variable
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D | X86RegisterInfo.cpp | 70 FramePtr = X86::RBP; in X86RegisterInfo() 74 FramePtr = X86::EBP; in X86RegisterInfo() 484 if (Reg == FramePtr && TFI->hasFP(MF)) { in hasReservedSpillSlot() 613 BasePtr = (FrameIndex < 0 ? FramePtr : StackPtr); in eliminateFrameIndex() 617 BasePtr = (TFI->hasFP(MF) ? FramePtr : StackPtr); in eliminateFrameIndex() 648 return TFI->hasFP(MF) ? FramePtr : StackPtr; in getFrameRegister()
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/external/llvm/lib/Target/ARM/ |
D | Thumb1FrameLowering.cpp | 107 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitPrologue() local 163 if (Reg == FramePtr) in emitPrologue() 240 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr) in emitPrologue() 246 nullptr, MRI->getDwarfRegNum(FramePtr, true), CFAOffset)); in emitPrologue() 253 nullptr, MRI->getDwarfRegNum(FramePtr, true))); in emitPrologue() 337 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitEpilogue() local 366 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes, in emitEpilogue() 374 .addReg(FramePtr)); in emitEpilogue()
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D | ARMFrameLowering.cpp | 311 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitPrologue() local 370 if (Reg == FramePtr) in emitPrologue() 525 dl, TII, FramePtr, ARM::SP, in emitPrologue() 530 nullptr, MRI->getDwarfRegNum(FramePtr, true), in emitPrologue() 538 nullptr, MRI->getDwarfRegNum(FramePtr, true))); in emitPrologue() 708 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitEpilogue() local 746 emitARMRegPlusImmediate(MBB, MBBI, dl, ARM::SP, FramePtr, -NumBytes, in emitEpilogue() 758 emitT2RegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes, in emitEpilogue() 768 .addReg(FramePtr).addImm((unsigned)ARMCC::AL).addReg(0).addReg(0); in emitEpilogue() 772 .addReg(FramePtr)); in emitEpilogue() [all …]
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D | ARMAsmPrinter.cpp | 1139 unsigned FramePtr = RegInfo->getFrameRegister(MF); in EmitUnwindingInstruction() local 1245 if (DstReg == FramePtr && FramePtr != ARM::SP) in EmitUnwindingInstruction() 1248 ATS.emitSetFP(FramePtr, ARM::SP, -Offset); in EmitUnwindingInstruction()
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D | ARMExpandPseudoInsts.cpp | 1164 unsigned FramePtr = RI.getFrameRegister(MF); in ExpandMI() local 1170 FramePtr, -NumBytes, ARMCC::AL, 0, *TII); in ExpandMI() 1173 FramePtr, -NumBytes, *TII, RI); in ExpandMI() 1176 FramePtr, -NumBytes, ARMCC::AL, 0, in ExpandMI()
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D | ARMFastISel.cpp | 2485 unsigned FramePtr = RegInfo->getFrameRegister(*(FuncInfo.MF)); in SelectIntrinsicCall() local 2486 unsigned SrcReg = FramePtr; in SelectIntrinsicCall()
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/external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
D | XCoreFrameLowering.cpp | 184 unsigned FramePtr = XCore::R10; in emitPrologue() local 185 BuildMI(MBB, MBBI, dl, TII.get(XCore::LDAWSP_ru6), FramePtr) in emitPrologue() 191 MachineLocation SPDst(FramePtr); in emitPrologue() 225 unsigned FramePtr = XCore::R10; in emitEpilogue() local 227 .addReg(FramePtr); in emitEpilogue()
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/external/llvm/lib/Target/XCore/ |
D | XCoreFrameLowering.cpp | 35 static const unsigned FramePtr = XCore::R10; variable 151 FramePtr)); in GetSpillList() 306 BuildMI(MBB, MBBI, dl, TII.get(XCore::LDAWSP_ru6), FramePtr).addImm(0); in emitPrologue() 309 MRI->getDwarfRegNum(FramePtr, true)); in emitPrologue() 385 BuildMI(MBB, MBBI, dl, TII.get(XCore::SETSP_1r)).addReg(FramePtr); in emitEpilogue()
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/external/llvm/lib/CodeGen/ |
D | SjLjEHPrepare.cpp | 382 Value *FramePtr = Builder.CreateConstGEP2_32(doubleUnderJBufTy, JBufPtr, 0, 0, in setupEntryBlockAndCallSites() local 386 Builder.CreateStore(Val, FramePtr, /*isVolatile=*/true); in setupEntryBlockAndCallSites()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
D | SjLjEHPrepare.cpp | 617 Value *FramePtr = in insertSjLjEHSupport() local 625 new StoreInst(Val, FramePtr, true, EntryBB->getTerminator()); in insertSjLjEHSupport() 949 Value *FramePtr = GetElementPtrInst::Create(JBufPtr, Idxs, "jbuf_fp_gep", in setupEntryBlockAndCallSites() local 956 new StoreInst(Val, FramePtr, true, EntryBB->getTerminator()); in setupEntryBlockAndCallSites()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64FrameLowering.cpp | 554 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitPrologue() local 623 unsigned Reg = RegInfo->getDwarfRegNum(FramePtr, true); in emitPrologue()
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