| /external/llvm/include/llvm/CodeGen/ |
| D | ValueTypes.h | 298 EVT HalfVT = EVT((MVT::SimpleValueType)IntVT); in getHalfSizedIntegerVT() local
299 if (HalfVT.getSizeInBits() * 2 >= EVTSize) in getHalfSizedIntegerVT()
300 return HalfVT; in getHalfSizedIntegerVT()
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| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | ValueTypes.h | 630 EVT HalfVT = EVT((MVT::SimpleValueType)IntVT); in getHalfSizedIntegerVT() local
631 if (HalfVT.getSizeInBits() * 2 >= EVTSize) in getHalfSizedIntegerVT()
632 return HalfVT; in getHalfSizedIntegerVT()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 1341 EVT HalfVT = VT.getHalfSizedIntegerVT(*DAG.getContext()); in LowerUDIVREM64() local
1343 SDValue one = DAG.getConstant(1, DL, HalfVT); in LowerUDIVREM64()
1344 SDValue zero = DAG.getConstant(0, DL, HalfVT); in LowerUDIVREM64()
1348 SDValue LHS_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, LHS, zero); in LowerUDIVREM64()
1349 SDValue LHS_Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, LHS, one); in LowerUDIVREM64()
1352 SDValue RHS_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, RHS, zero); in LowerUDIVREM64()
1353 SDValue RHS_Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, RHS, one); in LowerUDIVREM64()
1359 SDValue Res = DAG.getNode(ISD::UDIVREM, DL, DAG.getVTList(HalfVT, HalfVT), in LowerUDIVREM64()
1371 SDValue DIV_Part = DAG.getNode(ISD::UDIV, DL, HalfVT, LHS_Hi, RHS_Lo); in LowerUDIVREM64()
1372 SDValue REM_Part = DAG.getNode(ISD::UREM, DL, HalfVT, LHS_Hi, RHS_Lo); in LowerUDIVREM64()
[all …]
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | LegalizeTypes.cpp | 1126 EVT HalfVT = EVT::getIntegerVT(*DAG.getContext(), in SplitInteger() local
1128 SplitInteger(Op, HalfVT, HalfVT, Lo, Hi); in SplitInteger()
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| D | LegalizeIntegerTypes.cpp | 589 EVT HalfVT = EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts/2); in PromoteIntRes_TRUNCATE() local
593 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, HalfVT, InOp, in PromoteIntRes_TRUNCATE()
595 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, HalfVT, InOp, in PromoteIntRes_TRUNCATE()
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| D | SelectionDAGBuilder.cpp | 122 EVT HalfVT = EVT::getIntegerVT(*DAG.getContext(), RoundBits/2); in getCopyFromParts() local
126 PartVT, HalfVT); in getCopyFromParts()
128 RoundParts / 2, PartVT, HalfVT); in getCopyFromParts()
130 Lo = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[0]); in getCopyFromParts()
131 Hi = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[1]); in getCopyFromParts()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeTypes.cpp | 1161 EVT HalfVT = EVT::getIntegerVT(*DAG.getContext(), in SplitInteger() local
1163 SplitInteger(Op, HalfVT, HalfVT, Lo, Hi); in SplitInteger()
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| D | DAGCombiner.cpp | 2971 EVT HalfVT = EVT::getIntegerVT(*DAG.getContext(), Size / 2); in visitANDLike() local
2977 TLI.isNarrowingProfitable(VT, HalfVT) && in visitANDLike()
2978 TLI.isTypeDesirableForOp(ISD::AND, HalfVT) && in visitANDLike()
2979 TLI.isTypeDesirableForOp(ISD::SRL, HalfVT) && in visitANDLike()
2980 TLI.isTruncateFree(VT, HalfVT) && in visitANDLike()
2981 TLI.isZExtFree(HalfVT, VT)) { in visitANDLike()
2991 EVT ShiftVT = TLI.getShiftAmountTy(HalfVT, DAG.getDataLayout()); in visitANDLike()
2992 SDValue Trunc = DAG.getNode(ISD::TRUNCATE, SL, HalfVT, in visitANDLike()
2995 SDValue NewMask = DAG.getConstant(AndMask.trunc(Size / 2), SL, HalfVT); in visitANDLike()
2997 SDValue Shift = DAG.getNode(ISD::SRL, SL, HalfVT, Trunc, ShiftK); in visitANDLike()
[all …]
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| D | LegalizeVectorTypes.cpp | 1971 EVT HalfVT = EVT::getVectorVT(*DAG.getContext(), HalfElementVT, in SplitVecOp_TruncateHelper() local
1973 SDValue HalfLo = DAG.getNode(N->getOpcode(), DL, HalfVT, InLoVec); in SplitVecOp_TruncateHelper()
1974 SDValue HalfHi = DAG.getNode(N->getOpcode(), DL, HalfVT, InHiVec); in SplitVecOp_TruncateHelper()
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| D | SelectionDAGBuilder.cpp | 154 EVT HalfVT = EVT::getIntegerVT(*DAG.getContext(), RoundBits/2); in getCopyFromParts() local
158 PartVT, HalfVT, V); in getCopyFromParts()
160 RoundParts / 2, PartVT, HalfVT, V); in getCopyFromParts()
162 Lo = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[0]); in getCopyFromParts()
163 Hi = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[1]); in getCopyFromParts()
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| D | TargetLowering.cpp | 935 EVT HalfVT = Op.getOperand(0).getValueType(); in SimplifyDemandedBits() local
936 unsigned HalfBitWidth = HalfVT.getScalarSizeInBits(); in SimplifyDemandedBits()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 8792 EVT HalfVT = in split16BStores() local
8794 SDValue SubVector0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, HalfVT, StVal, in split16BStores()
8796 SDValue SubVector1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, HalfVT, StVal, in split16BStores()
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