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Searched refs:HalfWordAccess (Results 1 – 6 of 6) sorted by relevance

/external/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonBaseInfo.h97 HalfWordAccess = 2, // Half word access instruction (memh). enumerator
DHexagonMCCodeEmitter.cpp391 case HexagonII::MemAccessSize::HalfWordAccess: in getFixupNoBits()
/external/llvm/lib/Target/Hexagon/
DHexagonInstrInfo.td1732 let accessSize = HalfWordAccess, opExtentAlign = 1 in {
1743 let accessSize = HalfWordAccess, opExtentAlign = 1 in {
1778 let accessSize = HalfWordAccess, opExtentBits = 12, opExtentAlign = 1 in
1927 let accessSize = HalfWordAccess, opExtentAlign = 1 in {
1942 let accessSize = HalfWordAccess, opExtentAlign = 1 in {
1983 let accessSize = HalfWordAccess, opExtentAlign = 1 in
2015 def L2_loadrh_pr : T_load_pr <"memh", IntRegs, 0b1010, HalfWordAccess>;
2016 def L2_loadruh_pr : T_load_pr <"memuh", IntRegs, 0b1011, HalfWordAccess>;
2019 def L2_loadbzw2_pr : T_load_pr <"memubh", IntRegs, 0b0011, HalfWordAccess>;
2078 let accessSize = HalfWordAccess in {
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DHexagonInstrInfoV4.td421 let accessSize = HalfWordAccess, hasNewValue = 1 in {
442 let accessSize = HalfWordAccess in
479 let accessSize = HalfWordAccess in {
620 let hasNewValue = 1, accessSize = HalfWordAccess in {
715 HalfWordAccess>;
720 0b011, HalfWordAccess, 1>;
751 def S4_storerhnew_ap : T_ST_absset_nv <"memh", "STrih", 0b01, HalfWordAccess>;
790 HalfWordAccess>;
792 HalfWordAccess, 1>;
848 def S4_storerhnew_ur : T_StoreAbsRegNV <"memh", "STrih", 0b01, HalfWordAccess>;
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DHexagonIsetDx.td106 let isCodeGenOnly = 1, mayLoad = 1, accessSize = HalfWordAccess, hasNewValue = 1, opNewValue = 0 in
233 let isCodeGenOnly = 1, mayStore = 1, accessSize = HalfWordAccess in
303 let isCodeGenOnly = 1, mayLoad = 1, accessSize = HalfWordAccess, hasNewValue = 1, opNewValue = 0 in
DHexagonInstrFormats.td59 def HalfWordAccess : MemAccessSize<2>;// Half word access instruction (memh).