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Searched refs:I64 (Results 1 – 25 of 59) sorted by relevance

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/external/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrInteger.td62 def EQZ_I64 : I<(outs I32:$dst), (ins I64:$src),
63 [(set I32:$dst, (setcc I64:$src, 0, SETEQ))],
71 def : Pat<(rotl I64:$lhs, (and I64:$rhs, 63)), (ROTL_I64 I64:$lhs, I64:$rhs)>;
72 def : Pat<(rotr I64:$lhs, (and I64:$rhs, 63)), (ROTR_I64 I64:$lhs, I64:$rhs)>;
79 def SELECT_I64 : I<(outs I64:$dst), (ins I64:$lhs, I64:$rhs, I32:$cond),
80 [(set I64:$dst, (select I32:$cond, I64:$lhs, I64:$rhs))],
90 def : Pat<(select (i32 (setne I32:$cond, 0)), I64:$lhs, I64:$rhs),
91 (SELECT_I64 I64:$lhs, I64:$rhs, I32:$cond)>;
96 def : Pat<(select (i32 (seteq I32:$cond, 0)), I64:$lhs, I64:$rhs),
97 (SELECT_I64 I64:$rhs, I64:$lhs, I32:$cond)>;
DWebAssemblyInstrConv.td18 def I32_WRAP_I64 : I<(outs I32:$dst), (ins I64:$src),
19 [(set I32:$dst, (trunc I64:$src))],
22 def I64_EXTEND_S_I32 : I<(outs I64:$dst), (ins I32:$src),
23 [(set I64:$dst, (sext I32:$src))],
25 def I64_EXTEND_U_I32 : I<(outs I64:$dst), (ins I32:$src),
26 [(set I64:$dst, (zext I32:$src))],
46 def I64_TRUNC_S_F32 : I<(outs I64:$dst), (ins F32:$src),
47 [(set I64:$dst, (fp_to_sint F32:$src))],
49 def I64_TRUNC_U_F32 : I<(outs I64:$dst), (ins F32:$src),
50 [(set I64:$dst, (fp_to_uint F32:$src))],
[all …]
DWebAssemblyInstrFormats.td36 def _I64 : I<(outs I64:$dst), (ins I64:$src),
37 [(set I64:$dst, (node I64:$src))],
44 def _I64 : I<(outs I64:$dst), (ins I64:$lhs, I64:$rhs),
45 [(set I64:$dst, (node I64:$lhs, I64:$rhs))],
68 def _I64 : I<(outs I32:$dst), (ins I64:$lhs, I64:$rhs),
69 [(set I32:$dst, (setcc I64:$lhs, I64:$rhs, cond))],
DWebAssemblyInstrMemory.td64 def LOAD_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr,
157 def LOAD8_S_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr,
160 def LOAD8_U_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr,
163 def LOAD16_S_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr,
166 def LOAD16_U_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr,
169 def LOAD32_S_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr,
172 def LOAD32_U_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr,
459 def STORE_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr,
460 P2Align:$p2align, I64:$val), [],
473 def : Pat<(store I64:$val, I32:$addr), (STORE_I64 0, I32:$addr, 0, I64:$val)>;
[all …]
DWebAssemblyInstrInfo.td104 defm : ARGUMENT<I64>;
131 defm : LOCAL<I64>;
139 def CONST_I64 : I<(outs I64:$res), (ins i64imm:$imm),
140 [(set I64:$res, imm:$imm)],
DWebAssemblyInstrControl.td53 def BR_TABLE_I64 : I<(outs), (ins I64:$index, variable_ops),
54 [(WebAssemblybr_table I64:$index)],
83 defm : RETURN<I64>;
/external/llvm/lib/Target/Hexagon/
DHexagonIntrinsics.td25 : Pat <(IntID I64:$Rs),
26 (MI I64:$Rs)>;
43 : Pat<(IntID I64:$Rs, imm:$It),
44 (MI I64:$Rs, imm:$It)>;
47 : Pat<(IntID I32:$Rs, I64:$Rt),
48 (MI I32:$Rs, I64:$Rt)>;
55 : Pat <(IntID I64:$Rs, I64:$Rt),
56 (MI I64:$Rs, I64:$Rt)>;
79 : Pat <(IntID I32:$Rp, I64:$Rs, I64:$Rt),
80 (MI (C2_tfrrp I32:$Rp), I64:$Rs, I64:$Rt)>;
[all …]
DHexagonInstrInfoV5.td47 [(set I64:$dst,
48 (sra (i64 (add (i64 (sra I64:$src1, u6ImmPred:$src2)), 1)),
129 [(set I32:$Rd, (HexagonPOPCOUNT I64:$Rss))], "", S_2op_tc_2_SLOT23>,
615 sint_to_fp, F32, I64>;
617 uint_to_fp, F32, I64>;
623 sint_to_fp, F64, I64>;
625 uint_to_fp, F64, I64>;
641 fp_to_sint, I64, F64, ":chop">;
643 fp_to_uint, I64, F64, ":chop">;
645 fp_to_sint, I64, F32, ":chop">;
[all …]
DHexagonInstrInfo.td24 def I64 : PatLeaf<(i64 DoubleRegs:$R)>;
1295 def: Pat<(i64 (add I64:$Rs, I64:$Rt)), (A2_addp I64:$Rs, I64:$Rt)>;
1296 def: Pat<(i64 (sub I64:$Rs, I64:$Rt)), (A2_subp I64:$Rs, I64:$Rt)>;
1307 def: Pat<(i64 (and I64:$Rs, I64:$Rt)), (A2_andp I64:$Rs, I64:$Rt)>;
1308 def: Pat<(i64 (or I64:$Rs, I64:$Rt)), (A2_orp I64:$Rs, I64:$Rt)>;
1309 def: Pat<(i64 (xor I64:$Rs, I64:$Rt)), (A2_xorp I64:$Rs, I64:$Rt)>;
3381 def: Storepi_pat<post_store, I64, s4_3ImmPred, S2_storerd_pi>;
3601 defm: Storex_pat<store, I64, s29_3ImmPred, S2_storerd_io>;
3606 defm: Storex_pat<SwapSt<atomic_store_64>, I64, s29_3ImmPred, S2_storerd_io>;
3613 def: Storex_simple_pat<store, I64, S2_storerd_io>;
[all …]
/external/vixl/examples/aarch32/
Dpi.cc47 __ Vmov(I64, d10, 0); // d10 = 0.0; in GenerateApproximatePi()
48 __ Vmov(I64, d11, 0); // d11 = 0.0; in GenerateApproximatePi()
49 __ Vmov(I64, d12, 0); // d12 = 0.0; in GenerateApproximatePi()
50 __ Vmov(I64, d13, 0); // d13 = 0.0 in GenerateApproximatePi()
/external/netperf/src/
Dnet_uuid.c69 #define I64(C) C macro
71 #define I64(C) C##LL macro
143 + I64(0x01B21DD213814000); in get_system_time()
/external/v8/src/base/
Dmacros.h188 # define V8_INT64_C(x) (x ## I64)
190 # define V8_INTPTR_C(x) (x ## I64)
/external/vixl/src/aarch32/
Doperands-aarch32.h260 immediate_type_(I64) {} in NeonImmediate()
263 immediate_type_(I64) {} in NeonImmediate()
289 if (immediate_type_.Is(I64)) in GetImmediate()
313 bool IsInteger64() const { return immediate_type_.Is(I64); } in IsInteger64()
327 (immediate_type_.Is(I64) && ((imm_.u64_ >> (8 * sizeof(T))) == 0)) || in CanConvert()
333 (immediate_type_.Is(I64) && ((imm_.u64_ >> 32) == 0)) || in CanConvert()
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dinlineasm3.ll8 ; CHECK: vmov.I64 q15, #0
12 …call void asm sideeffect "vmov.I64 q15, #0\0Avmov.32 d30[0], $1\0Avmov ${0:q}, q15\0A", "=*w,r,~{d…
/external/llvm/test/CodeGen/ARM/
Dinlineasm3.ll9 ; CHECK: vmov.I64 q15, #0
13 …call void asm sideeffect "vmov.I64 q15, #0\0Avmov.32 d30[0], $1\0Avmov ${0:q}, q15\0A", "=*w,r,~{d…
/external/clang/test/Lexer/
Dms-extensions.c9 __int64 x6 = 0x42I64;
/external/bison/m4/
Dinttypes.m444 for glpfx in '' l ll I64; do
49 I64) gltype1='__int64';;
/external/google-breakpad/src/third_party/linux/include/gflags/
Dgflags.h493 #define DECLARE_int64(name) DECLARE_VARIABLE(::google::int64,I64, name)
494 #define DEFINE_int64(name,val,txt) DEFINE_VARIABLE(::google::int64,I64, name, val, txt)
/external/libyuv/files/third_party/gflags/gen/win/include/gflags/
Dgflags_declare.h124 DECLARE_VARIABLE(::GFLAGS_NAMESPACE::int64, I64, name)
/external/libyuv/files/third_party/gflags/gen/posix/include/gflags/
Dgflags_declare.h124 DECLARE_VARIABLE(::GFLAGS_NAMESPACE::int64, I64, name)
/external/libvpx/libvpx/third_party/libyuv/include/libyuv/
Dbasic_types.h29 #define INT64_C(x) x ## I64
/external/libyuv/files/include/libyuv/
Dbasic_types.h29 #define INT64_C(x) x##I64
/external/webrtc/third_party/gflags/gen/posix/include/gflags/
Dgflags.h529 #define DECLARE_int64(name) DECLARE_VARIABLE(::google::int64, I64, name)
530 #define DEFINE_int64(name,val,txt) DEFINE_VARIABLE(::google::int64, I64, name, val, txt)
/external/webrtc/third_party/gflags/gen/win/include/gflags/
Dgflags.h549 #define DECLARE_int64(name) DECLARE_VARIABLE(::google::int64, I64, name)
550 #define DEFINE_int64(name,val,txt) DEFINE_VARIABLE(::google::int64, I64, name, val, txt)
/external/valgrind/none/tests/amd64/
Drcl-amd64.c4 #define I64(C) "rcrq %%rbx\n" "rclq $" #C ",%%rax\n" "rclq %%rbx\n" macro
12 asm(I64(C) : "+a"(a), "+b"(b) : /* */); \

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