/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | FastISel.cpp | 272 EVT IdxVT = EVT::getEVT(Idx->getType(), /*HandleUnknown=*/false); in getRegForGEPIndex() local 273 if (IdxVT.bitsLT(PtrVT)) { in getRegForGEPIndex() 274 IdxN = FastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::SIGN_EXTEND, in getRegForGEPIndex() 278 else if (IdxVT.bitsGT(PtrVT)) { in getRegForGEPIndex() 279 IdxN = FastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::TRUNCATE, in getRegForGEPIndex()
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D | LegalizeDAG.cpp | 652 EVT IdxVT = Tmp3.getValueType(); in PerformInsertVectorEltInMemory() local 664 unsigned CastOpc = IdxVT.bitsGT(PtrVT) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; in PerformInsertVectorEltInMemory() 668 Tmp3 = DAG.getNode(ISD::MUL, dl, IdxVT, Tmp3,DAG.getConstant(EltSize, IdxVT)); in PerformInsertVectorEltInMemory() 669 SDValue StackPtr2 = DAG.getNode(ISD::ADD, dl, IdxVT, Tmp3, StackPtr); in PerformInsertVectorEltInMemory()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeDAG.cpp | 329 EVT IdxVT = Tmp3.getValueType(); in PerformInsertVectorEltInMemory() local 345 Tmp3 = DAG.getNode(ISD::MUL, dl, IdxVT, Tmp3, in PerformInsertVectorEltInMemory() 346 DAG.getConstant(EltSize, dl, IdxVT)); in PerformInsertVectorEltInMemory() 347 SDValue StackPtr2 = DAG.getNode(ISD::ADD, dl, IdxVT, Tmp3, StackPtr); in PerformInsertVectorEltInMemory() 4294 EVT IdxVT = Idx.getValueType(); in PromoteNode() local 4296 SDValue Factor = DAG.getConstant(NewEltsPerOldElt, SL, IdxVT); in PromoteNode() 4297 SDValue NewBaseIdx = DAG.getNode(ISD::MUL, SL, IdxVT, Idx, Factor); in PromoteNode() 4303 SDValue IdxOffset = DAG.getConstant(I, SL, IdxVT); in PromoteNode() 4304 SDValue TmpIdx = DAG.getNode(ISD::ADD, SL, IdxVT, NewBaseIdx, IdxOffset); in PromoteNode() 4342 EVT IdxVT = Idx.getValueType(); in PromoteNode() local [all …]
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D | FastISel.cpp | 327 EVT IdxVT = EVT::getEVT(Idx->getType(), /*HandleUnknown=*/false); in getRegForGEPIndex() local 328 if (IdxVT.bitsLT(PtrVT)) { in getRegForGEPIndex() 329 IdxN = fastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::SIGN_EXTEND, IdxN, in getRegForGEPIndex() 332 } else if (IdxVT.bitsGT(PtrVT)) { in getRegForGEPIndex() 334 fastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::TRUNCATE, IdxN, IdxNIsKill); in getRegForGEPIndex()
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D | TargetLowering.cpp | 3217 EVT IdxVT = getVectorIdxTy(DAG.getDataLayout()); in scalarizeVectorStore() local 3225 DAG.getConstant(Idx, SL, IdxVT)); in scalarizeVectorStore()
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D | SelectionDAGBuilder.cpp | 3176 EVT IdxVT = TLI.getVectorIdxTy(DAG.getDataLayout()); in visitShuffleVector() local 3190 EltVT, Src, DAG.getConstant(Idx, dl, IdxVT)); in visitShuffleVector()
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D | DAGCombiner.cpp | 7289 EVT IdxVT = TLI.getVectorIdxTy(DAG.getDataLayout()); in visitTRUNCATE() local 7291 VecSrc, DAG.getConstant(0, SL, IdxVT)); in visitTRUNCATE()
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/external/llvm/lib/Target/X86/ |
D | X86InstrAVX512.td | 1076 X86VectorVTInfo _, X86VectorVTInfo IdxVT> { 1078 defm rr: AVX512_maskable_3src_cast<opc, MRMSrcReg, _, IdxVT, (outs _.RC:$dst), 1081 (_.VT (X86VPermi2X IdxVT.RC:$src1, _.RC:$src2, _.RC:$src3))>, EVEX_4V, 1084 defm rm: AVX512_maskable_3src_cast<opc, MRMSrcMem, _, IdxVT, (outs _.RC:$dst), 1087 (_.VT (X86VPermi2X IdxVT.RC:$src1, _.RC:$src2, 1093 X86VectorVTInfo _, X86VectorVTInfo IdxVT> { 1095 defm rmb: AVX512_maskable_3src_cast<opc, MRMSrcMem, _, IdxVT, (outs _.RC:$dst), 1099 (_.VT (X86VPermi2X IdxVT.RC:$src1, 1155 X86VectorVTInfo _, X86VectorVTInfo IdxVT> { 1158 (ins IdxVT.RC:$src2, _.RC:$src3), [all …]
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/external/llvm/lib/Target/AArch64/ |
D | AArch64FastISel.cpp | 4824 EVT IdxVT = EVT::getEVT(Idx->getType(), /*HandleUnknown=*/false); in getRegForGEPIndex() local 4825 if (IdxVT.bitsLT(PtrVT)) { in getRegForGEPIndex() 4826 IdxN = emitIntExt(IdxVT.getSimpleVT(), IdxN, PtrVT, /*IsZExt=*/false); in getRegForGEPIndex() 4828 } else if (IdxVT.bitsGT(PtrVT)) in getRegForGEPIndex()
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