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Searched refs:ImmTy (Results 1 – 4 of 4) sorted by relevance

/external/llvm/lib/Target/AMDGPU/AsmParser/
DAMDGPUAsmParser.cpp102 enum ImmTy { enum in __anon2fa8e53e0111::AMDGPUOperand
140 ImmTy Type;
205 bool isImmTy(ImmTy ImmT) const { in isImmTy()
329 enum ImmTy getImmTy() const { in getImmTy()
433 void printImmTy(raw_ostream& OS, ImmTy Type) const { in printImmTy()
488 enum ImmTy Type = ImmTyNone, in CreateImm()
659 … enum AMDGPUOperand::ImmTy ImmTy = AMDGPUOperand::ImmTyNone,
662 enum AMDGPUOperand::ImmTy ImmTy = AMDGPUOperand::ImmTyNone);
723 AMDGPUOperand::ImmTy Type);
734 AMDGPUOperand::ImmTy Type;
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMInstrNEON.td2403 Format f, InstrItinClass itin, Operand ImmTy,
2406 (outs DPR:$Vd), (ins DPR:$Vm, ImmTy:$SIMM), f, itin,
2410 Format f, InstrItinClass itin, Operand ImmTy,
2413 (outs QPR:$Vd), (ins QPR:$Vm, ImmTy:$SIMM), f, itin,
2430 ValueType ResTy, ValueType OpTy, Operand ImmTy, SDNode OpNode>
2432 (outs DPR:$Vd), (ins QPR:$Vm, ImmTy:$SIMM), N2RegVShRFrm, itin,
2440 Operand ImmTy, string OpcodeStr, string Dt,
2443 (ins DPR:$src1, DPR:$Vm, ImmTy:$SIMM), N2RegVShRFrm, IIC_VPALiD,
2448 Operand ImmTy, string OpcodeStr, string Dt,
2451 (ins QPR:$src1, QPR:$Vm, ImmTy:$SIMM), N2RegVShRFrm, IIC_VPALiD,
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/external/llvm/lib/Target/ARM/
DARMInstrNEON.td3124 Format f, InstrItinClass itin, Operand ImmTy,
3127 (outs DPR:$Vd), (ins DPR:$Vm, ImmTy:$SIMM), f, itin,
3131 Format f, InstrItinClass itin, Operand ImmTy,
3134 (outs QPR:$Vd), (ins QPR:$Vm, ImmTy:$SIMM), f, itin,
3142 ValueType ResTy, ValueType OpTy, Operand ImmTy,
3145 (outs QPR:$Vd), (ins DPR:$Vm, ImmTy:$SIMM), N2RegVShLFrm,
3147 [(set QPR:$Vd, (ResTy (OpNode (OpTy DPR:$Vm), ImmTy:$SIMM)))]>;
3152 ValueType ResTy, ValueType OpTy, Operand ImmTy,
3155 (outs DPR:$Vd), (ins QPR:$Vm, ImmTy:$SIMM), N2RegVShRFrm, itin,
3158 (i32 ImmTy:$SIMM))))]>;
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/external/llvm/lib/Target/Hexagon/AsmParser/
DHexagonAsmParser.cpp187 struct ImmTy { struct
198 struct ImmTy Imm;