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Searched refs:IsD (Results 1 – 7 of 7) sorted by relevance

/external/vixl/src/aarch64/
Dassembler-aarch64.cc1899 V(saddl, NEON_SADDL, vn.IsVector() && vn.IsD()) \
1901 V(sabal, NEON_SABAL, vn.IsVector() && vn.IsD()) \
1903 V(uabal, NEON_UABAL, vn.IsVector() && vn.IsD()) \
1905 V(sabdl, NEON_SABDL, vn.IsVector() && vn.IsD()) \
1907 V(uabdl, NEON_UABDL, vn.IsVector() && vn.IsD()) \
1909 V(smlal, NEON_SMLAL, vn.IsVector() && vn.IsD()) \
1911 V(umlal, NEON_UMLAL, vn.IsVector() && vn.IsD()) \
1913 V(smlsl, NEON_SMLSL, vn.IsVector() && vn.IsD()) \
1915 V(umlsl, NEON_UMLSL, vn.IsVector() && vn.IsD()) \
1917 V(smull, NEON_SMULL, vn.IsVector() && vn.IsD()) \
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Doperands-aarch64.h192 bool IsFPRegister() const { return IsS() || IsD(); } in IsFPRegister()
207 bool IsD() const { return IsV() && Is64Bits(); } in IsD() function
Dmacro-assembler-aarch64.h1472 if (vt.IsD()) { in Ldr()
/external/vixl/src/aarch32/
Dinstructions-aarch32.h117 bool IsD() const { return GetType() == kDRegister; } in IsD() function
119 bool IsVRegister() const { return IsS() || IsD() || IsQ(); } in IsVRegister()
120 bool IsFPRegister() const { return IsS() || IsD(); } in IsFPRegister()
Dmacro-assembler-aarch32.h10589 VIXL_ASSERT(rd.IsS() || rd.IsD()); in Vabs()
10599 VIXL_ASSERT(rd.IsS() || rd.IsD()); in Vadd()
10610 VIXL_ASSERT(rd.IsS() || rd.IsD()); in Vcmp()
10620 VIXL_ASSERT(rd.IsS() || rd.IsD()); in Vcmpe()
10630 VIXL_ASSERT(rd.IsS() || rd.IsD()); in Vdiv()
10641 VIXL_ASSERT(rd.IsS() || rd.IsD()); in Vfma()
10652 VIXL_ASSERT(rd.IsS() || rd.IsD()); in Vfms()
10663 VIXL_ASSERT(rd.IsS() || rd.IsD()); in Vfnma()
10676 VIXL_ASSERT(rd.IsS() || rd.IsD()); in Vfnms()
10689 VIXL_ASSERT(rd.IsS() || rd.IsD()); in Vmaxnm()
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/external/v8/src/arm64/
Dsimulator-arm64.h248 bool IsD() const { return type_ == D_ARG; }
Dsimulator-arm64.cc134 } else if (arg.IsD() && (index_d < 8)) { in CallVoid()
137 DCHECK(arg.IsD() || arg.IsX()); in CallVoid()