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Searched refs:LC0 (Results 1 – 25 of 39) sorted by relevance

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/external/llvm/test/CodeGen/PowerPC/
Dblockaddress.ll14 ; MEDIUM: addis [[R0:[0-9]+]], 2, .LC[[LC0:[0-9]+]]@toc@ha
15 ; MEDIUM: ld 3, .LC[[LC0]]@toc@l([[R0]])
17 ; MEDIUM: .LC[[LC0]]:
20 ; SMALL: ld 3, .LC[[LC0:[0-9]+]]@toc(2)
22 ; SMALL: .LC[[LC0]]:
D2012-09-16-TOC-entry-check.ll5 ; This test check if the TOC entry symbol name won't clash with global .LC0
8 @.LC0 = internal global [5 x i8] c".LC0\00"
22 ; avoid name clash with global constants .LC0 and .LC2
/external/llvm/test/MC/Sparc/
Dsparc-pic.s15 ! PIC-NEXT: 0x{{[0-9,A-F]+}} R_SPARC_GOT22 .LC0 0x0
16 ! PIC-NEXT: 0x{{[0-9,A-F]+}} R_SPARC_GOT10 .LC0 0x0
37 .LC0: label
63 sethi %hi(.LC0), %i2
64 add %i2, %lo(.LC0), %i2
/external/swiftshader/third_party/LLVM/test/Assembler/
D2002-08-15-UnresolvedGlobalReference.ll3 @.LC0 = internal global [12 x i8] c"hello world\00" ; <[12 x i8]*> [#uses=1]
6 ret i8* getelementptr ([12 x i8]* @.LC0, i64 0, i64 0)
D2002-08-15-ConstantExprProblem.ll3 @.LC0 = internal global [12 x i8] c"hello world\00" ; <[12 x i8]*> [#uses=1]
10 …%ret = phi i8* [ getelementptr ([12 x i8]* @.LC0, i64 0, i64 0), %0 ], [ null, %BB2 ] ; <…
D2002-08-16-ConstExprInlined.ll13 @.LC0 = internal global [4 x i8] c"foo\00" ; <[4 x i8]*> [#uses=1]
20 %reg211 = call i32 @puts( i8* getelementptr ([4 x i8]* @.LC0, i64 0, i64 0) ) ; <i32> [#uses=0]
/external/llvm/test/Assembler/
D2002-08-15-UnresolvedGlobalReference.ll4 @.LC0 = internal global [12 x i8] c"hello world\00" ; <[12 x i8]*> [#uses=1]
7 ret i8* getelementptr ([12 x i8], [12 x i8]* @.LC0, i64 0, i64 0)
D2002-08-15-ConstantExprProblem.ll4 @.LC0 = internal global [12 x i8] c"hello world\00" ; <[12 x i8]*> [#uses=1]
11 …%ret = phi i8* [ getelementptr ([12 x i8], [12 x i8]* @.LC0, i64 0, i64 0), %0 ], [ null, %BB2 ] …
D2002-08-16-ConstExprInlined.ll14 @.LC0 = internal global [4 x i8] c"foo\00" ; <[4 x i8]*> [#uses=1]
21 …%reg211 = call i32 @puts( i8* getelementptr ([4 x i8], [4 x i8]* @.LC0, i64 0, i64 0) ) ; <i32> […
/external/valgrind/VEX/test/
Dfpgames.s5 .LC0: label
24 pushl $.LC0
47 pushl $.LC0
Dfp1.s9 .LC0: label
21 fldl .LC0
/external/swiftshader/third_party/LLVM/test/ExecutionEngine/
Dhello.ll4 @.LC0 = internal global [12 x i8] c"Hello World\00" ; <[12 x i8]*> [#uses=1]
9 %reg210 = call i32 @puts( i8* getelementptr ([12 x i8]* @.LC0, i64 0, i64 0) ) ; <i32> [#uses=0]
D2002-12-16-ArgTest.ll3 @.LC0 = internal global [10 x i8] c"argc: %d\0A\00" ; <[10 x i8]*> [#uses=1]
16 …call i32 (i8*, ...)* @printf( i8* getelementptr ([10 x i8]* @.LC0, i64 0, i64 0), i32 %argc ) ; <…
/external/llvm/test/ExecutionEngine/MCJIT/
Dhello.ll3 @.LC0 = internal global [12 x i8] c"Hello World\00" ; <[12 x i8]*> [#uses=1]
8 …%reg210 = call i32 @puts( i8* getelementptr ([12 x i8], [12 x i8]* @.LC0, i64 0, i64 0) ) ; <i32>…
D2002-12-16-ArgTest.ll3 @.LC0 = internal global [10 x i8] c"argc: %d\0A\00" ; <[10 x i8]*> [#uses=1]
16 …call i32 (i8*, ...) @printf( i8* getelementptr ([10 x i8], [10 x i8]* @.LC0, i64 0, i64 0), i32 %a…
/external/llvm/test/ExecutionEngine/OrcMCJIT/
Dhello.ll3 @.LC0 = internal global [12 x i8] c"Hello World\00" ; <[12 x i8]*> [#uses=1]
8 …%reg210 = call i32 @puts( i8* getelementptr ([12 x i8], [12 x i8]* @.LC0, i64 0, i64 0) ) ; <i32>…
D2002-12-16-ArgTest.ll3 @.LC0 = internal global [10 x i8] c"argc: %d\0A\00" ; <[10 x i8]*> [#uses=1]
16 …call i32 (i8*, ...) @printf( i8* getelementptr ([10 x i8], [10 x i8]* @.LC0, i64 0, i64 0), i32 %a…
/external/valgrind/memcheck/tests/x86/
Dtronical.S70 .LC0: label
83 pushl $.LC0
/external/swiftshader/third_party/LLVM/test/Transforms/Reassociate/
Dlooptest.ll17 @.LC0 = internal global [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
35 %cast227 = getelementptr [4 x i8]* @.LC0, i64 0, i64 0 ; <i8*> [#uses=1]
/external/llvm/test/Transforms/Reassociate/
Dlooptest.ll17 @.LC0 = internal global [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
36 %cast227 = getelementptr [4 x i8], [4 x i8]* @.LC0, i64 0, i64 0 ; <i8*> [#uses=1]
/external/llvm/lib/Target/Hexagon/
DHexagonRegisterInfo.td142 def LC0 : Rc<1, "lc0", ["c1"]>, DwarfRegNum<[68]>;
167 def C1_0 : Rcc<0, "c1:0", [SA0, LC0], ["lc0:sa0"]>, DwarfRegNum<[67]>;
259 (add LC0, SA0, LC1, SA1,
273 LC0, LC1, SA0, SA1, USR, USR_OVF, CS0, CS1,
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DREADME-MMX.txt71 movq LC0(%rip), %rax
/external/llvm/lib/Target/X86/
DREADME-MMX.txt71 movq LC0(%rip), %rax
/external/llvm/test/CodeGen/Hexagon/
Dswp-const-tc.ll4 ; of computing a new LC0 value.
/external/swiftshader/third_party/LLVM/lib/Target/Blackfin/
DBlackfinRegisterInfo.td192 def LC0 : Ri<6, 0, "lc0">, DwarfRegNum<[46]>;
247 LC0, LT0, LB0, LC1, LT1, LB1, CYCLES, CYCLES2,
274 def kCons : RegisterClass<"BF", [i32], 32, (add LC0, LC1)>;

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