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Searched refs:LC1 (Results 1 – 24 of 24) sorted by relevance

/external/valgrind/VEX/test/
Dfpgames.s7 .LC1: label
34 pushl $.LC1
60 pushl $.LC1
68 pushl $.LC1
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dstm.ll4 @"\01LC1" = internal constant [26 x i8] c"Bitwise Not: %d %d %d %d\0A\00", section "__TEXT,__cstrin…
13 …%0 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([26 x i8]* @"\01LC1", i32 0, i32 0), i32…
/external/llvm/test/CodeGen/ARM/
Dstm.ll4 @"\01LC1" = internal constant [26 x i8] c"Bitwise Not: %d %d %d %d\0A\00", section "__TEXT,__cstrin…
13 …%0 = tail call i32 (i8*, ...) @printf(i8* getelementptr ([26 x i8], [26 x i8]* @"\01LC1", i32 0, i…
/external/llvm/test/MC/PowerPC/
Dppc64-relocs-01.s11 ld 4, .LC1@toc(2)
15 .LC1: label
Dppc-reloc.s11 .LC1: label
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
D2008-09-29-ReMatBug.ll11 @"\01LC1" = internal constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1]
38 call void @foo(i8* getelementptr ([1 x i8]* @"\01LC1", i32 0, i32 0)) nounwind nounwind
Dnegate-add-zero.ll108 @"\01LC1" = external constant [7 x i8] ; <[7 x i8]*> [#uses=0]
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DLegalizeFloatTypes.cpp621 RTLIB::Libcall LC1 = RTLIB::UNKNOWN_LIBCALL, LC2 = RTLIB::UNKNOWN_LIBCALL; in SoftenSetCCOperands() local
625 LC1 = (VT == MVT::f32) ? RTLIB::OEQ_F32 : RTLIB::OEQ_F64; in SoftenSetCCOperands()
629 LC1 = (VT == MVT::f32) ? RTLIB::UNE_F32 : RTLIB::UNE_F64; in SoftenSetCCOperands()
633 LC1 = (VT == MVT::f32) ? RTLIB::OGE_F32 : RTLIB::OGE_F64; in SoftenSetCCOperands()
637 LC1 = (VT == MVT::f32) ? RTLIB::OLT_F32 : RTLIB::OLT_F64; in SoftenSetCCOperands()
641 LC1 = (VT == MVT::f32) ? RTLIB::OLE_F32 : RTLIB::OLE_F64; in SoftenSetCCOperands()
645 LC1 = (VT == MVT::f32) ? RTLIB::OGT_F32 : RTLIB::OGT_F64; in SoftenSetCCOperands()
648 LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 : RTLIB::UO_F64; in SoftenSetCCOperands()
651 LC1 = (VT == MVT::f32) ? RTLIB::O_F32 : RTLIB::O_F64; in SoftenSetCCOperands()
654 LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 : RTLIB::UO_F64; in SoftenSetCCOperands()
[all …]
/external/llvm/test/CodeGen/X86/
D2008-09-29-ReMatBug.ll11 @"\01LC1" = internal constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1]
38 call void @foo(i8* getelementptr ([1 x i8], [1 x i8]* @"\01LC1", i32 0, i32 0)) nounwind nounwind
Dnegate-add-zero.ll108 @"\01LC1" = external constant [7 x i8] ; <[7 x i8]*> [#uses=0]
/external/llvm/lib/Target/Hexagon/
DHexagonRegisterInfo.td144 def LC1 : Rc<3, "lc1", ["c3"]>, DwarfRegNum<[70]>;
168 def C3_2 : Rcc<2, "c3:2", [SA1, LC1], ["lc1:sa1"]>, DwarfRegNum<[69]>;
259 (add LC0, SA0, LC1, SA1,
273 LC0, LC1, SA0, SA1, USR, USR_OVF, CS0, CS1,
DHexagonRegisterInfo.cpp146 Reserved.set(Hexagon::LC1); in getReservedRegs()
DHexagonHardwareLoops.cpp964 R == Hexagon::LC1 || R == Hexagon::SA1)) in isInvalidLoopOperation()
966 if (!IsInnerHWLoop && (R == Hexagon::LC1 || R == Hexagon::SA1)) in isInvalidLoopOperation()
DHexagonInstrInfo.td4563 let Defs = [SA1, LC1] in
4574 Defs = [PC, LC1], Uses = [SA1, LC1] in {
/external/clang/test/SemaCXX/
Dclass.cpp92 class LC1 { in f() class
/external/swiftshader/third_party/LLVM/lib/Target/Blackfin/
DBlackfinRegisterInfo.td193 def LC1 : Ri<6, 3, "lc1">, DwarfRegNum<[47]>;
247 LC0, LT0, LB0, LC1, LT1, LB1, CYCLES, CYCLES2,
274 def kCons : RegisterClass<"BF", [i32], 32, (add LC0, LC1)>;
DBlackfinInstrInfo.td169 Defs = [R0, R1, R2, R3, P0, P1, P2, LB0, LB1, LC0, LC1, RETS, ASTAT] in {
/external/ltp/testcases/kernel/syscalls/ptrace/
Dptrace04.c41 R(LC0) R(LC1) R(LT0) R(LT1) R(LB0) R(LB1)
/external/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp158 RTLIB::Libcall LC1 = RTLIB::UNKNOWN_LIBCALL, LC2 = RTLIB::UNKNOWN_LIBCALL; in softenSetCCOperands() local
163 LC1 = (VT == MVT::f32) ? RTLIB::OEQ_F32 : in softenSetCCOperands()
169 LC1 = (VT == MVT::f32) ? RTLIB::UNE_F32 : in softenSetCCOperands()
175 LC1 = (VT == MVT::f32) ? RTLIB::OGE_F32 : in softenSetCCOperands()
181 LC1 = (VT == MVT::f32) ? RTLIB::OLT_F32 : in softenSetCCOperands()
187 LC1 = (VT == MVT::f32) ? RTLIB::OLE_F32 : in softenSetCCOperands()
193 LC1 = (VT == MVT::f32) ? RTLIB::OGT_F32 : in softenSetCCOperands()
198 LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 : in softenSetCCOperands()
203 LC1 = (VT == MVT::f32) ? RTLIB::O_F32 : in softenSetCCOperands()
209 LC1 = (VT == MVT::f32) ? RTLIB::OLT_F32 : in softenSetCCOperands()
[all …]
/external/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonMCChecker.h189 Hexagon::SA1 == R || Hexagon::LC1 == R); in isLoopRegister()
DHexagonMCChecker.cpp44 Defs[Hexagon::LC1].insert(Unconditional); in init()
/external/swiftshader/third_party/LLVM/test/Transforms/Inline/
D2009-01-13-RecursiveInlineCrash.ll8 @"\01LC1" = external constant [19 x i8] ; <[19 x i8]*> [#uses=0]
/external/llvm/test/Transforms/Inline/
D2009-01-13-RecursiveInlineCrash.ll8 @"\01LC1" = external constant [19 x i8] ; <[19 x i8]*> [#uses=0]
/external/llvm/lib/Target/Hexagon/Disassembler/
DHexagonDisassembler.cpp565 Hexagon::SA0, Hexagon::LC0, Hexagon::SA1, Hexagon::LC1, in DecodeCtrRegsRegisterClass()