Searched refs:LDS (Results 1 – 25 of 26) sorted by relevance
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| /external/llvm/test/CodeGen/AMDGPU/ |
| D | lds-oqap-crash.ll | 5 ; if an LDS instruction could fit in the current clause, but never finding
8 ; The LDS instruction should not have been defining OQAP in the first place,
9 ; because the LDS instructions are pseudo instructions and the OQAP
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| D | gep-address-space.ll | 15 ; The LDS offset will be 65536 bytes, which is larger than the size of LDS on
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| D | promote-alloca-padding-size-estimate.ll | 3 ; This shows that the amount of LDS estimate is sensitive to the order
4 ; of the LDS globals.
6 ; Both of these functions use the same amount of LDS, but the total
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| D | private-memory-atomics.ll | 4 ; This works because promote allocas pass replaces these with LDS atomics.
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| D | local-64.ll | 36 ; The LDS offset will be 65536 bytes, which is larger than the size of LDS on
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| D | promote-alloca-stored-pointer-value.ll | 4 ; Pointer value is stored in a candidate for LDS usage.
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| D | llvm.SI.fs.interp.ll | 23 ; on 16 bank LDS chips.
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| D | local-memory.ll | 8 ; Check that the LDS size emitted correctly
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| D | local-memory-two-objects.ll | 9 ; Check that the LDS size emitted correctly
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| D | shl_add_ptr.ll | 7 ; LDS globals.
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| D | lds-alignment.ll | 31 ; were to be a dynamically sized LDS kernel arg, the runtime should
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| D | ds_read2.ll | 279 ; allows unaligned LDS accesses, which would be a problem here.
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| /external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/ |
| D | SIMCCodeEmitter.cpp | 38 LDS = 1, enumerator
281 case SIInstrEncodingType::LDS: in getEncodingBytes()
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | compute_resource.def | 33 DECL_COMPUTE_RESOURCE(LDS, 1)
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| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| D | AlphaInstrInfo.cpp | 41 case Alpha::LDS: in isLoadFromStackSlot()
183 BuildMI(MBB, MI, DL, get(Alpha::LDS), DestReg) in loadRegFromStackSlot()
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| D | AlphaLLRP.cpp | 66 case Alpha::LDT: case Alpha::LDS: in runOnMachineFunction()
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| D | AlphaInstrInfo.td | 486 def LDS : MForm<0x22, 1, "lds $RA,$DISP($RB)",
544 (LDS 0, GPRC:$addr)>;
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | SIInstrInfo.td | 230 bits<1> LDS;
242 let Inst{16} = LDS;
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPU.td | 107 "The number of LDS banks per compute unit."
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| D | SIInstrFormats.td | 716 // Internally, FLAT instruction are executed as both an LDS and a
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| D | EvergreenInstructions.td | 432 // LDS Instructions
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| /external/llvm/lib/Target/AVR/ |
| D | AVR.td | 50 // `LDS Rd, K`
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| /external/mesa3d/src/mesa/x86/ |
| D | assyntax.h | 509 #define LDS(a, b) CHOICE(ldsl ARG2(a,b), lds ARG2(a,b), lds ARG2(b,a)) macro
1234 #define LDS(a, b) lds b, P_(a) macro
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86GenAsmWriter.inc | 5933 "2\000LCMPXCHG64\000LCMPXCHG8\000LCMPXCHG8B\000LDDQUrm\000LDMXCSR\000LDS"
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| D | X86GenAsmWriter1.inc | 6676 "2\000LCMPXCHG64\000LCMPXCHG8\000LCMPXCHG8B\000LDDQUrm\000LDMXCSR\000LDS"
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