Searched refs:MII_TG3_DSP_RW_PORT (Results 1 – 2 of 2) sorted by relevance
| /external/syslinux/gpxe/src/drivers/net/ |
| D | tg3.c | 260 err |= tg3_writephy(tp, MII_TG3_DSP_RW_PORT, val); in tg3_writedsp()
343 tg3_writephy(tp, MII_TG3_DSP_RW_PORT, in tg3_phy_write_and_check_testpat()
369 tg3_readphy(tp, MII_TG3_DSP_RW_PORT, &low); in tg3_phy_write_and_check_testpat()
370 tg3_readphy(tp, MII_TG3_DSP_RW_PORT, &high); in tg3_phy_write_and_check_testpat()
380 tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x4001); in tg3_phy_write_and_check_testpat()
381 tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x4005); in tg3_phy_write_and_check_testpat()
402 tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x000); in tg3_phy_reset_chanpat()
446 tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x0800); in tg3_phy_reset_5703_4_5()
458 tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x0000); in tg3_phy_reset_5703_4_5()
2594 tg3_writedsp(tp, MII_TG3_DSP_RW_PORT, 0x2aaa); in tg3_phy_probe()
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| D | tg3.h | 1517 #define MII_TG3_DSP_RW_PORT 0x15 /* DSP coefficient read/write port */ macro
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