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Searched refs:MaskReg (Results 1 – 3 of 3) sorted by relevance

/external/llvm/lib/Target/Mips/MCTargetDesc/
DMipsNaClELFStreamer.cpp93 void emitMask(unsigned AddrReg, unsigned MaskReg, in emitMask() argument
99 MaskInst.addOperand(MCOperand::createReg(MaskReg)); in emitMask()
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCISelLowering.cpp4754 unsigned MaskReg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary() local
4813 BuildMI(BB, dl, TII->get(PPC::SLW), MaskReg) in EmitPartwordAtomicBinary()
4823 .addReg(TmpDestReg).addReg(MaskReg); in EmitPartwordAtomicBinary()
4825 .addReg(TmpReg).addReg(MaskReg); in EmitPartwordAtomicBinary()
5079 unsigned MaskReg = RegInfo.createVirtualRegister(RC); in EmitInstrWithCustomInserter() local
5148 BuildMI(BB, dl, TII->get(PPC::SLW), MaskReg) in EmitInstrWithCustomInserter()
5151 .addReg(NewVal2Reg).addReg(MaskReg); in EmitInstrWithCustomInserter()
5153 .addReg(OldVal2Reg).addReg(MaskReg); in EmitInstrWithCustomInserter()
5159 .addReg(TmpDestReg).addReg(MaskReg); in EmitInstrWithCustomInserter()
5169 .addReg(TmpDestReg).addReg(MaskReg); in EmitInstrWithCustomInserter()
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp8545 unsigned MaskReg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary() local
8604 BuildMI(BB, dl, TII->get(PPC::SLW), MaskReg) in EmitPartwordAtomicBinary()
8614 .addReg(TmpDestReg).addReg(MaskReg); in EmitPartwordAtomicBinary()
8616 .addReg(TmpReg).addReg(MaskReg); in EmitPartwordAtomicBinary()
9263 unsigned MaskReg = RegInfo.createVirtualRegister(RC); in EmitInstrWithCustomInserter() local
9332 BuildMI(BB, dl, TII->get(PPC::SLW), MaskReg) in EmitInstrWithCustomInserter()
9335 .addReg(NewVal2Reg).addReg(MaskReg); in EmitInstrWithCustomInserter()
9337 .addReg(OldVal2Reg).addReg(MaskReg); in EmitInstrWithCustomInserter()
9343 .addReg(TmpDestReg).addReg(MaskReg); in EmitInstrWithCustomInserter()
9353 .addReg(TmpDestReg).addReg(MaskReg); in EmitInstrWithCustomInserter()