Searched refs:Masked (Results 1 – 15 of 15) sorted by relevance
113 let DST_SEL_Y = 7; // Masked114 let DST_SEL_Z = 7; // Masked115 let DST_SEL_W = 7; // Masked123 let DST_SEL_Y = 7; // Masked124 let DST_SEL_Z = 7; // Masked125 let DST_SEL_W = 7; // Masked135 let DST_SEL_Y = 7; // Masked136 let DST_SEL_Z = 7; // Masked137 let DST_SEL_W = 7; // Masked
141 let DST_SEL_Y = 7; // Masked142 let DST_SEL_Z = 7; // Masked143 let DST_SEL_W = 7; // Masked152 let DST_SEL_Y = 7; // Masked153 let DST_SEL_Z = 7; // Masked154 let DST_SEL_W = 7; // Masked165 let DST_SEL_Y = 7; // Masked166 let DST_SEL_Z = 7; // Masked167 let DST_SEL_W = 7; // Masked
29 + Masked stencil comparison
78 # Masked parity
1002 let DST_SEL_Y = 7; // Masked1003 let DST_SEL_Z = 7; // Masked1004 let DST_SEL_W = 7; // Masked
1698 Value *Masked = nullptr; in FoldOrOfICmps() local1705 Masked = Builder->CreateAnd(LAnd->getOperand(0), Mask); in FoldOrOfICmps()1712 Masked = Builder->CreateAnd(LAnd->getOperand(1), Mask); in FoldOrOfICmps()1715 if (Masked) in FoldOrOfICmps()1716 return Builder->CreateICmp(ICmpInst::ICMP_NE, Masked, Mask); in FoldOrOfICmps()
217 ; Masked parity
6350 llvm::SmallVector<char, 2> Masked; in emitX86DeclareSimdFunction() local6353 Masked.push_back('N'); in emitX86DeclareSimdFunction()6354 Masked.push_back('M'); in emitX86DeclareSimdFunction()6357 Masked.push_back('N'); in emitX86DeclareSimdFunction()6360 Masked.push_back('M'); in emitX86DeclareSimdFunction()6363 for (auto Mask : Masked) { in emitX86DeclareSimdFunction()
654 //===-------------------------- Masked Intrinsics -------------------------===//
969 // Masked store fragments.
100 # Vector Move Immediate Masked101 # Vector Move Inverted Immediate Masked
876 ; Masked Uniform Constant Rotates
1397 ; Masked Uniform Constant Rotates
387 ; Masked gather for agregate types
11562 Masked Vector Load and Store Intrinsics11657 Masked Vector Gather and Scatter Intrinsics11660 LLVM provides intrinsics for vector gather and scatter operations. They are similar to :ref:`Masked…