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Searched refs:NewMask (Results 1 – 22 of 22) sorted by relevance

/external/llvm/lib/CodeGen/
DRegisterPressure.cpp28 LaneBitmask PrevMask, LaneBitmask NewMask) { in increaseSetPressure() argument
29 assert((PrevMask & ~NewMask) == 0 && "Must not remove bits"); in increaseSetPressure()
30 if (PrevMask != 0 || NewMask == 0) in increaseSetPressure()
42 LaneBitmask PrevMask, LaneBitmask NewMask) { in decreaseSetPressure() argument
43 assert((NewMask & !PrevMask) == 0 && "Must not add bits"); in decreaseSetPressure()
44 if (NewMask != 0 || PrevMask == 0) in decreaseSetPressure()
114 LaneBitmask NewMask) { in increaseRegPressure() argument
115 if (PreviousMask != 0 || NewMask == 0) in increaseRegPressure()
129 LaneBitmask NewMask) { in decreaseRegPressure() argument
130 decreaseSetPressure(CurrSetPressure, *MRI, RegUnit, PreviousMask, NewMask); in decreaseRegPressure()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp1215 APInt NewMask = DemandedMask; in SimplifyDemandedBits() local
1231 NewMask = APInt::getAllOnesValue(BitWidth); in SimplifyDemandedBits()
1245 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & NewMask; in SimplifyDemandedBits()
1246 KnownZero = ~KnownOne & NewMask; in SimplifyDemandedBits()
1256 TLO.DAG.ComputeMaskedBits(Op.getOperand(0), NewMask, in SimplifyDemandedBits()
1259 if ((LHSZero & NewMask) == (~RHSC->getAPIntValue() & NewMask)) in SimplifyDemandedBits()
1263 if (TLO.ShrinkDemandedConstant(Op, ~LHSZero & NewMask)) in SimplifyDemandedBits()
1267 if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero, in SimplifyDemandedBits()
1271 if (SimplifyDemandedBits(Op.getOperand(0), ~KnownZero & NewMask, in SimplifyDemandedBits()
1278 if ((NewMask & ~KnownZero2 & KnownOne) == (~KnownZero2 & NewMask)) in SimplifyDemandedBits()
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DLegalizeVectorTypes.cpp1973 SmallVector<int, 16> NewMask; in WidenVecRes_VECTOR_SHUFFLE() local
1977 NewMask.push_back(Idx); in WidenVecRes_VECTOR_SHUFFLE()
1979 NewMask.push_back(Idx - NumElts + WidenNumElts); in WidenVecRes_VECTOR_SHUFFLE()
1982 NewMask.push_back(-1); in WidenVecRes_VECTOR_SHUFFLE()
1983 return DAG.getVectorShuffle(WidenVT, dl, InOp1, InOp2, &NewMask[0]); in WidenVecRes_VECTOR_SHUFFLE()
DLegalizeDAG.cpp177 SmallVector<int, 8> NewMask; in ShuffleWithNarrowerEltType() local
182 NewMask.push_back(-1); in ShuffleWithNarrowerEltType()
184 NewMask.push_back(Idx * NumEltsGrowth + j); in ShuffleWithNarrowerEltType()
187 assert(NewMask.size() == NumDestElts && "Non-integer NumEltsGrowth?"); in ShuffleWithNarrowerEltType()
188 assert(TLI.isShuffleMaskLegal(NewMask, NVT) && "Shuffle not legal?"); in ShuffleWithNarrowerEltType()
189 return DAG.getVectorShuffle(NVT, dl, N1, N2, &NewMask[0]); in ShuffleWithNarrowerEltType()
DLegalizeIntegerTypes.cpp2877 SmallVector<int, 8> NewMask; in PromoteIntRes_VECTOR_SHUFFLE() local
2879 NewMask.push_back(SV->getMaskElt(i)); in PromoteIntRes_VECTOR_SHUFFLE()
2886 return DAG.getVectorShuffle(OutVT, dl, V0, V1, &NewMask[0]); in PromoteIntRes_VECTOR_SHUFFLE()
DDAGCombiner.cpp4588 APInt NewMask = Mask << Amt; in GetDemandedBits() local
4589 SDValue SimplifyLHS = GetDemandedBits(V.getOperand(0), NewMask); in GetDemandedBits()
/external/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp437 APInt NewMask = DemandedMask; in SimplifyDemandedBits() local
454 NewMask = APInt::getAllOnesValue(BitWidth); in SimplifyDemandedBits()
481 if ((LHSZero & NewMask) == (~RHSC->getAPIntValue() & NewMask)) in SimplifyDemandedBits()
485 if (TLO.ShrinkDemandedConstant(Op, ~LHSZero & NewMask)) in SimplifyDemandedBits()
489 if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero, in SimplifyDemandedBits()
493 if (SimplifyDemandedBits(Op.getOperand(0), ~KnownZero & NewMask, in SimplifyDemandedBits()
500 if ((NewMask & ~KnownZero2 & KnownOne) == (~KnownZero2 & NewMask)) in SimplifyDemandedBits()
502 if ((NewMask & ~KnownZero & KnownOne2) == (~KnownZero & NewMask)) in SimplifyDemandedBits()
505 if ((NewMask & (KnownZero|KnownZero2)) == NewMask) in SimplifyDemandedBits()
508 if (TLO.ShrinkDemandedConstant(Op, ~KnownZero2 & NewMask)) in SimplifyDemandedBits()
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DDAGCombiner.cpp2995 SDValue NewMask = DAG.getConstant(AndMask.trunc(Size / 2), SL, HalfVT); in visitANDLike() local
2998 SDValue And = DAG.getNode(ISD::AND, SL, HalfVT, Shift, NewMask); in visitANDLike()
6754 APInt NewMask = Mask << Amt; in GetDemandedBits() local
6755 if (SDValue SimplifyLHS = GetDemandedBits(V.getOperand(0), NewMask)) in GetDemandedBits()
7614 SmallVector<int, 8> NewMask; in visitBITCAST() local
7617 NewMask.push_back(M < 0 ? -1 : M * MaskScale + i); in visitBITCAST()
7619 bool LegalMask = TLI.isShuffleMaskLegal(NewMask, VT); in visitBITCAST()
7622 ShuffleVectorSDNode::commuteMask(NewMask); in visitBITCAST()
7623 LegalMask = TLI.isShuffleMaskLegal(NewMask, VT); in visitBITCAST()
7627 return DAG.getVectorShuffle(VT, SDLoc(N), SV0, SV1, NewMask); in visitBITCAST()
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DLegalizeDAG.cpp226 SmallVector<int, 8> NewMask; in ShuffleWithNarrowerEltType() local
231 NewMask.push_back(-1); in ShuffleWithNarrowerEltType()
233 NewMask.push_back(Idx * NumEltsGrowth + j); in ShuffleWithNarrowerEltType()
236 assert(NewMask.size() == NumDestElts && "Non-integer NumEltsGrowth?"); in ShuffleWithNarrowerEltType()
237 assert(TLI.isShuffleMaskLegal(NewMask, NVT) && "Shuffle not legal?"); in ShuffleWithNarrowerEltType()
238 return DAG.getVectorShuffle(NVT, dl, N1, N2, NewMask); in ShuffleWithNarrowerEltType()
2994 SmallVector<int, 32> NewMask; in ExpandNode() local
3034 NewMask.push_back(Mask[i]); in ExpandNode()
3038 NewMask.push_back(Mask[i]*factor+fi); in ExpandNode()
3041 Mask = NewMask; in ExpandNode()
DLegalizeVectorTypes.cpp3009 SmallVector<int, 16> NewMask; in WidenVecRes_VECTOR_SHUFFLE() local
3013 NewMask.push_back(Idx); in WidenVecRes_VECTOR_SHUFFLE()
3015 NewMask.push_back(Idx - NumElts + WidenNumElts); in WidenVecRes_VECTOR_SHUFFLE()
3018 NewMask.push_back(-1); in WidenVecRes_VECTOR_SHUFFLE()
3019 return DAG.getVectorShuffle(WidenVT, dl, InOp1, InOp2, NewMask); in WidenVecRes_VECTOR_SHUFFLE()
DLegalizeIntegerTypes.cpp3256 ArrayRef<int> NewMask = SV->getMask().slice(0, VT.getVectorNumElements()); in PromoteIntRes_VECTOR_SHUFFLE() local
3262 return DAG.getVectorShuffle(OutVT, dl, V0, V1, NewMask); in PromoteIntRes_VECTOR_SHUFFLE()
/external/swiftshader/third_party/LLVM/lib/Transforms/InstCombine/
DInstCombineVectorOps.cpp536 std::vector<int> NewMask; in visitShuffleVectorInst() local
551 NewMask.push_back(MaskElt); in visitShuffleVectorInst()
556 if (isSplat || NewMask == LHSMask || NewMask == Mask) { in visitShuffleVectorInst()
559 for (unsigned i = 0, e = NewMask.size(); i != e; ++i) { in visitShuffleVectorInst()
560 if (NewMask[i] < 0) { in visitShuffleVectorInst()
563 Elts.push_back(ConstantInt::get(Int32Ty, NewMask[i])); in visitShuffleVectorInst()
DInstCombineSimplifyDemanded.cpp349 APInt NewMask = ~(LHSKnownOne & RHSKnownOne & DemandedMask); in SimplifyDemandedUseBits() local
352 ConstantInt::get(I->getType(), NewMask & AndRHS->getValue()); in SimplifyDemandedUseBits()
357 ConstantInt::get(I->getType(), NewMask & XorRHS->getValue()); in SimplifyDemandedUseBits()
/external/llvm/include/llvm/CodeGen/
DRegisterPressure.h539 LaneBitmask NewMask);
541 LaneBitmask NewMask);
/external/llvm/lib/Transforms/InstCombine/
DInstCombineAndOrXor.cpp512 unsigned NewMask; in conjugateICmpMask() local
513 NewMask = (Mask & (FoldMskICmp_AMask_AllOnes | FoldMskICmp_BMask_AllOnes | in conjugateICmpMask()
518 NewMask |= in conjugateICmpMask()
524 return NewMask; in conjugateICmpMask()
760 APInt NewMask = BCst->getValue() & DCst->getValue(); in foldLogOpOfMaskedICmps() local
762 if (NewMask == BCst->getValue()) in foldLogOpOfMaskedICmps()
764 else if (NewMask == DCst->getValue()) in foldLogOpOfMaskedICmps()
772 APInt NewMask = BCst->getValue() | DCst->getValue(); in foldLogOpOfMaskedICmps() local
774 if (NewMask == BCst->getValue()) in foldLogOpOfMaskedICmps()
776 else if (NewMask == DCst->getValue()) in foldLogOpOfMaskedICmps()
DInstCombineSimplifyDemanded.cpp389 APInt NewMask = ~(LHSKnownOne & RHSKnownOne & DemandedMask); in SimplifyDemandedUseBits() local
392 ConstantInt::get(I->getType(), NewMask & AndRHS->getValue()); in SimplifyDemandedUseBits()
397 ConstantInt::get(I->getType(), NewMask & XorRHS->getValue()); in SimplifyDemandedUseBits()
/external/llvm/lib/Target/X86/
DX86ISelDAGToDAG.cpp935 SDValue NewMask = DAG.getConstant(0xff, DL, VT); in foldMaskAndShiftToExtract() local
937 SDValue And = DAG.getNode(ISD::AND, DL, VT, Srl, NewMask); in foldMaskAndShiftToExtract()
948 insertDAGNode(DAG, N, NewMask); in foldMaskAndShiftToExtract()
982 SDValue NewMask = DAG.getConstant(Mask >> ShiftAmt, DL, VT); in foldMaskedShiftToScaledMask() local
983 SDValue NewAnd = DAG.getNode(ISD::AND, DL, VT, X, NewMask); in foldMaskedShiftToScaledMask()
991 insertDAGNode(DAG, N, NewMask); in foldMaskedShiftToScaledMask()
/external/llvm/lib/Target/SystemZ/
DSystemZISelDAGToDAG.cpp955 SDValue NewMask = CurDAG->getConstant(RISBG.Mask, DL, VT); in tryRISBGZero() local
956 N = CurDAG->UpdateNodeOperands(N, N->getOperand(0), NewMask); in tryRISBGZero()
/external/llvm/lib/Target/AMDGPU/
DSIISelLowering.cpp2625 uint32_t NewMask = (CLHS->getZExtValue() | CRHS->getZExtValue()) & MaxMask; in performOrCombine() local
2628 Src, DAG.getConstant(NewMask, DL, MVT::i32)); in performOrCombine()
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMISelLowering.cpp7129 SmallVector<int, 16> NewMask; in PerformVECTOR_SHUFFLECombine() local
7140 NewMask.push_back(NewElt); in PerformVECTOR_SHUFFLECombine()
7143 DAG.getUNDEF(VT), NewMask.data()); in PerformVECTOR_SHUFFLECombine()
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86ISelLowering.cpp6719 SDValue NewMask = NormalizeMask(SVOp, DAG); in LowerVECTOR_SHUFFLE() local
6720 ShuffleVectorSDNode *NSVOp = cast<ShuffleVectorSDNode>(NewMask); in LowerVECTOR_SHUFFLE()
6723 return NewMask; in LowerVECTOR_SHUFFLE()
6725 return NewMask; in LowerVECTOR_SHUFFLE()
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp9873 SmallVector<int, 16> NewMask; in PerformVECTOR_SHUFFLECombine() local
9884 NewMask.push_back(NewElt); in PerformVECTOR_SHUFFLECombine()
9887 DAG.getUNDEF(VT), NewMask); in PerformVECTOR_SHUFFLECombine()