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Searched refs:NumPredsLeft (Results 1 – 12 of 12) sorted by relevance

/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DScheduleDAGList.cpp112 if (SuccSU->NumPredsLeft == 0) { in ReleaseSucc()
119 --SuccSU->NumPredsLeft; in ReleaseSucc()
125 if (SuccSU->NumPredsLeft == 0 && SuccSU != &ExitSU) in ReleaseSucc()
DScheduleDAGRRList.cpp1317 if (SuccSU->NumPredsLeft == 0) { in ReleaseSucc()
1324 --SuccSU->NumPredsLeft; in ReleaseSucc()
1328 if (SuccSU->NumPredsLeft == 0 && SuccSU != &ExitSU) { in ReleaseSucc()
/external/llvm/lib/CodeGen/SelectionDAG/
DScheduleDAGVLIW.cpp120 if (SuccSU->NumPredsLeft == 0) { in releaseSucc()
129 --SuccSU->NumPredsLeft; in releaseSucc()
135 if (SuccSU->NumPredsLeft == 0 && SuccSU != &ExitSU) { in releaseSucc()
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DScheduleDAG.cpp106 assert(NumPredsLeft < UINT_MAX && "NumPredsLeft will overflow!"); in addPred()
107 ++NumPredsLeft; in addPred()
153 assert(NumPredsLeft > 0 && "NumPredsLeft will underflow!"); in removePred()
154 --NumPredsLeft; in removePred()
298 dbgs() << " # preds left : " << NumPredsLeft << "\n"; in dumpAll()
387 if (SUnits[i].NumPredsLeft != 0) { in VerifySchedule()
DPostRASchedulerList.cpp540 if (SuccSU->NumPredsLeft == 0) { in ReleaseSucc()
547 --SuccSU->NumPredsLeft; in ReleaseSucc()
562 if (SuccSU->NumPredsLeft == 0 && SuccSU != &ExitSU) in ReleaseSucc()
/external/llvm/lib/CodeGen/
DScheduleDAG.cpp108 assert(NumPredsLeft < UINT_MAX && "NumPredsLeft will overflow!"); in addPred()
109 ++NumPredsLeft; in addPred()
158 assert(NumPredsLeft > 0 && "NumPredsLeft will underflow!"); in removePred()
159 --NumPredsLeft; in removePred()
324 dbgs() << " # preds left : " << NumPredsLeft << "\n"; in dumpAll()
416 if (SUnits[i].NumPredsLeft != 0) { in VerifyScheduledDAG()
DPostRASchedulerList.cpp467 if (SuccSU->NumPredsLeft == 0) { in ReleaseSucc()
474 --SuccSU->NumPredsLeft; in ReleaseSucc()
489 if (SuccSU->NumPredsLeft == 0 && SuccSU != &ExitSU) in ReleaseSucc()
543 if (!SUnits[i].NumPredsLeft && !SUnits[i].isAvailable) { in ListScheduleTopDown()
DMachineScheduler.cpp564 if (SuccSU->NumPredsLeft == 0) { in releaseSucc()
576 --SuccSU->NumPredsLeft; in releaseSucc()
577 if (SuccSU->NumPredsLeft == 0 && SuccSU != &ExitSU) in releaseSucc()
771 if (!I->NumPredsLeft) in findRootsAndBiasEdges()
2741 bool AtBoundary = isTop ? !SU->NumSuccsLeft : !SU->NumPredsLeft; in biasPhysRegCopy()
/external/llvm/include/llvm/CodeGen/
DScheduleDAG.h270 unsigned NumPredsLeft; // # of preds not scheduled.
311 NumPredsLeft(0), NumSuccsLeft(0), WeakPredsLeft(0), WeakSuccsLeft(0),
327 NumPredsLeft(0), NumSuccsLeft(0), WeakPredsLeft(0), WeakSuccsLeft(0),
342 NumPredsLeft(0), NumSuccsLeft(0), WeakPredsLeft(0), WeakSuccsLeft(0),
468 return NumPredsLeft == 0;
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DScheduleDAG.h249 unsigned NumPredsLeft; // # of preds not scheduled.
281 NodeQueueId(0), NumPreds(0), NumSuccs(0), NumPredsLeft(0),
295 NodeQueueId(0), NumPreds(0), NumSuccs(0), NumPredsLeft(0),
308 NodeQueueId(0), NumPreds(0), NumSuccs(0), NumPredsLeft(0),
/external/llvm/lib/Target/AMDGPU/
DSIMachineScheduler.cpp274 if (!SU->NumPredsLeft) in fastSchedule()
392 if (!SU->NumPredsLeft) in schedule()
413 SU->NumPredsLeft == 0); in schedule()
440 ++SuccSU->NumPredsLeft; in undoReleaseSucc()
451 if (SuccSU->NumPredsLeft == 0) { in releaseSucc()
459 --SuccSU->NumPredsLeft; in releaseSucc()
471 if (SuccSU->NumPredsLeft == 0 && InOrOutBlock) in releaseSuccessors()
478 assert (!SU->NumPredsLeft); in nodeScheduled()
1754 SUnits[i].NumPredsLeft = SUnitsLinksBackup[i].NumPredsLeft; in restoreSULinksLeft()
/external/llvm/lib/Target/WebAssembly/
DWebAssemblyCFGStackify.cpp139 SmallVector<unsigned, 16> NumPredsLeft(MF.getNumBlockIDs(), 0); in SortBlocks() local
147 NumPredsLeft[MBB.getNumber()] = N; in SortBlocks()
188 if (--NumPredsLeft[Succ->getNumber()] == 0) in SortBlocks()