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Searched refs:R0 (Results 1 – 25 of 356) sorted by relevance

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/external/llvm/test/MC/Hexagon/
DcapitalizedEndloop.s6 { R0 = mpyi(R0,R0) } : endloop0
7 { R0 = mpyi(R0,R0) } : ENDLOOP0
8 { R0 = mpyi(R0,R0) }:endloop0
10 { R0 = mpyi(R0,R0) } : endloop1
11 { R0 = mpyi(R0,R0) } : ENDLOOP1
12 { R0 = mpyi(R0,R0) }:endloop1
14 { R0 = mpyi(R0,R0) } : endloop0 : endloop1
15 { R0 = mpyi(R0,R0) } : ENDLOOP0 : ENDLOOP1
16 { R0 = mpyi(R0,R0) }:endloop0:endloop1
/external/swiftshader/third_party/LLVM/test/CodeGen/Mips/
Dmips64intldst.ll16 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(c)
17 ; CHECK-N64: lb ${{[0-9]+}}, 0($[[R0]])
19 ; CHECK-N32: lw $[[R0:[0-9]+]], %got(c)
20 ; CHECK-N32: lb ${{[0-9]+}}, 0($[[R0]])
29 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(s)
30 ; CHECK-N64: lh ${{[0-9]+}}, 0($[[R0]])
32 ; CHECK-N32: lw $[[R0:[0-9]+]], %got(s)
33 ; CHECK-N32: lh ${{[0-9]+}}, 0($[[R0]])
42 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(i)
43 ; CHECK-N64: lw ${{[0-9]+}}, 0($[[R0]])
[all …]
Dmips64fpldst.ll12 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(f0)
13 ; CHECK-N64: lwc1 $f{{[0-9]+}}, 0($[[R0]])
15 ; CHECK-N32: lw $[[R0:[0-9]+]], %got(f0)
16 ; CHECK-N32: lwc1 $f{{[0-9]+}}, 0($[[R0]])
24 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(d0)
25 ; CHECK-N64: ldc1 $f{{[0-9]+}}, 0($[[R0]])
27 ; CHECK-N32: lw $[[R0:[0-9]+]], %got(d0)
28 ; CHECK-N32: ldc1 $f{{[0-9]+}}, 0($[[R0]])
36 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(f0)
37 ; CHECK-N64: swc1 $f{{[0-9]+}}, 0($[[R0]])
[all …]
Datomic.ll11 ; CHECK: lw $[[R0:[0-9]+]], %got(x)($gp)
13 ; CHECK: ll $[[R1:[0-9]+]], 0($[[R0]])
15 ; CHECK: sc $[[R2]], 0($[[R0]])
25 ; CHECK: lw $[[R0:[0-9]+]], %got(x)($gp)
27 ; CHECK: ll $[[R1:[0-9]+]], 0($[[R0]])
30 ; CHECK: sc $[[R2]], 0($[[R0]])
43 ; CHECK: lw $[[R0:[0-9]+]], %got(x)($gp)
45 ; CHECK: ll ${{[0-9]+}}, 0($[[R0]])
46 ; CHECK: sc $[[R2:[0-9]+]], 0($[[R0]])
59 ; CHECK: lw $[[R0:[0-9]+]], %got(x)($gp)
[all …]
/external/llvm/test/CodeGen/Mips/
Dmips64intldst.ll18 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(c)
19 ; CHECK-N64: lb ${{[0-9]+}}, 0($[[R0]])
21 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(c)
22 ; CHECK-N32: lb ${{[0-9]+}}, 0($[[R0]])
31 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(s)
32 ; CHECK-N64: lh ${{[0-9]+}}, 0($[[R0]])
34 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(s)
35 ; CHECK-N32: lh ${{[0-9]+}}, 0($[[R0]])
44 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(i)
45 ; CHECK-N64: lw ${{[0-9]+}}, 0($[[R0]])
[all …]
Dbswap.ll8 ; MIPS32: wsbh $[[R0:[0-9]+]]
9 ; MIPS32: rotr ${{[0-9]+}}, $[[R0]], 16
12 ; MIPS64: wsbh $[[R0:[0-9]+]]
13 ; MIPS64: rotr ${{[0-9]+}}, $[[R0]], 16
16 ; MIPS16-DAG: srl $[[R0:[0-9]+]], $4, 8
21 ; MIPS16-DAG: and $[[R4]], $[[R0]]
35 ; MIPS32: wsbh $[[R0:[0-9]+]]
36 ; MIPS32: rotr ${{[0-9]+}}, $[[R0]], 16
37 ; MIPS32: wsbh $[[R0:[0-9]+]]
38 ; MIPS32: rotr ${{[0-9]+}}, $[[R0]], 16
[all …]
Dcmov.ll14 ; 32-CMOV-DAG: lw $[[R0:[0-9]+]], %got(i3)
16 ; 32-CMOV-DAG: movn $[[R0]], $[[R1]], $4
17 ; 32-CMOV-DAG: lw $2, 0($[[R0]])
19 ; 32-CMP-DAG: lw $[[R0:[0-9]+]], %got(i3)
22 ; 32-CMP-DAG: seleqz $[[T1:[0-9]+]], $[[R0]], $4
26 ; 64-CMOV-DAG: ldr $[[R0:[0-9]+]]
28 ; 64-CMOV-DAG: movn $[[R0]], $[[R1]], $4
30 ; 64-CMP-DAG: ld $[[R0:[0-9]+]], %got_disp(i3)(
37 ; 64-CMP-DAG: seleqz $[[T1:[0-9]+]], $[[R0]], $[[CC]]
55 ; 32-CMOV-DAG: addiu $[[R0:[0-9]+]], ${{[0-9]+}}, %got(c)
[all …]
Dmno-ldc1-sdc1.ll66 ; 32R1-LE-PIC-DAG: lw $[[R0:[0-9]+]], 0(${{[0-9]+}})
68 ; 32R1-LE-PIC-DAG: mtc1 $[[R0]], $f0
71 ; 32R2-LE-PIC-DAG: lw $[[R0:[0-9]+]], 0(${{[0-9]+}})
73 ; 32R2-LE-PIC-DAG: mtc1 $[[R0]], $f0
76 ; 32R6-LE-PIC-DAG: lw $[[R0:[0-9]+]], 0(${{[0-9]+}})
78 ; 32R6-LE-PIC-DAG: mtc1 $[[R0]], $f0
81 ; 32R1-LE-STATIC-DAG: lui $[[R0:[0-9]+]], %hi(g0)
82 ; 32R1-LE-STATIC-DAG: lw $[[R1:[0-9]+]], %lo(g0)($[[R0]])
83 ; 32R1-LE-STATIC-DAG: addiu $[[R2:[0-9]+]], $[[R0]], %lo(g0)
88 ; 32R2-LE-STATIC-DAG: lui $[[R0:[0-9]+]], %hi(g0)
[all …]
Doptimize-fp-math.ll6 ; 32: sqrt.s $f[[R0:[0-9]+]], $f{{[0-9]+}}
7 ; 32: c.un.s $f[[R0]], $f[[R0]]
9 ; 64: sqrt.s $f[[R0:[0-9]+]], $f{{[0-9]+}}
10 ; 64: c.un.s $f[[R0]], $f[[R0]]
21 ; 32: sqrt.d $f[[R0:[0-9]+]], $f{{[0-9]+}}
22 ; 32: c.un.d $f[[R0]], $f[[R0]]
24 ; 64: sqrt.d $f[[R0:[0-9]+]], $f{{[0-9]+}}
25 ; 64: c.un.d $f[[R0]], $f[[R0]]
Dzeroreg.ll18 ; 32R6: lw $[[R0:[0-9]+]], 0(${{[0-9]+}})
19 ; 32R6: seleqz $2, $[[R0]], $4
24 ; 64R6: lw $[[R0:[0-9]+]], 0(${{[0-9]+}})
25 ; 64R6: seleqz $2, $[[R0]], $4
40 ; 32R6: lw $[[R0:[0-9]+]], 0(${{[0-9]+}})
41 ; 32R6: selnez $2, $[[R0]], $4
46 ; 64R6: lw $[[R0:[0-9]+]], 0(${{[0-9]+}})
47 ; 64R6: selnez $2, $[[R0]], $4
61 ; 32-CMOV-DAG: lw $[[R0:2]], 0(${{[0-9]+}})
63 ; 32-CMOV-DAG: movn $[[R0]], $zero, $4
[all …]
Dtls.ll17 ; PIC-DAG: addu $[[R0:[a-z0-9]+]], $2, $25
18 ; PIC-DAG: lw $25, %call16(__tls_get_addr)($[[R0]])
19 ; PIC-DAG: addiu $4, $[[R0]], %tlsgd(t1)
24 ; STATIC: lui $[[R0:[0-9]+]], %tprel_hi(t1)
25 ; STATIC: addiu $[[R1:[0-9]+]], $[[R0]], %tprel_lo(t1)
40 ; PIC-DAG: addu $[[R0:[a-z0-9]+]], $2, $25
41 ; PIC-DAG: lw $25, %call16(__tls_get_addr)($[[R0]])
42 ; PIC-DAG: addiu $4, $[[R0]], %tlsgd(t2)
47 ; STATICGP: lui $[[R0:[0-9]+]], %hi(__gnu_local_gp)
48 ; STATICGP: addiu $[[GP:[0-9]+]], $[[R0]], %lo(__gnu_local_gp)
[all …]
Dmips64fpldst.ll16 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(f0)
17 ; CHECK-N64: lwc1 $f{{[0-9]+}}, 0($[[R0]])
19 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(f0)
20 ; CHECK-N32: lwc1 $f{{[0-9]+}}, 0($[[R0]])
28 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(d0)
29 ; CHECK-N64: ldc1 $f{{[0-9]+}}, 0($[[R0]])
31 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(d0)
32 ; CHECK-N32: ldc1 $f{{[0-9]+}}, 0($[[R0]])
40 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(f0)
41 ; CHECK-N64: swc1 $f{{[0-9]+}}, 0($[[R0]])
[all …]
D2009-11-16-CstPoolLoad.ll10 ; PIC-O32: lw $[[R0:[0-9]+]], %got($CPI0_0)
11 ; PIC-O32: lwc1 $f0, %lo($CPI0_0)($[[R0]])
12 ; STATIC-O32: lui $[[R0:[0-9]+]], %hi($CPI0_0)
13 ; STATIC-O32: lwc1 $f0, %lo($CPI0_0)($[[R0]])
14 ; PIC-N32: lw $[[R0:[0-9]+]], %got_page($CPI0_0)
15 ; PIC-N32: lwc1 $f0, %got_ofst($CPI0_0)($[[R0]])
16 ; STATIC-N32: lui $[[R0:[0-9]+]], %hi($CPI0_0)
17 ; STATIC-N32: lwc1 $f0, %lo($CPI0_0)($[[R0]])
18 ; PIC-N64: ld $[[R0:[0-9]+]], %got_page($CPI0_0)
19 ; PIC-N64: lwc1 $f0, %got_ofst($CPI0_0)($[[R0]])
[all …]
Dint-to-float-conversion.ll9 ; 32: mtc1 ${{[0-9]+}}, $f[[R0:[0-9]+]]
10 ; 32: cvt.s.w $f{{[0-9]+}}, $f[[R0]]
19 ; 32: mtc1 ${{[0-9]+}}, $f[[R0:[0-9]+]]
20 ; 32: cvt.d.w $f{{[0-9]+}}, $f[[R0]]
22 ; 64: mtc1 ${{[0-9]+}}, $f[[R0:[0-9]+]]
23 ; 64: cvt.d.w $f{{[0-9]+}}, $f[[R0]]
32 ; 64: dmtc1 ${{[0-9]+}}, $f[[R0:[0-9]+]]
33 ; 64: cvt.s.l $f{{[0-9]+}}, $f[[R0]]
42 ; 64: dmtc1 ${{[0-9]+}}, $f[[R0:[0-9]+]]
43 ; 64: cvt.d.l $f{{[0-9]+}}, $f[[R0]]
Dsint-fp-store_pattern.ll9 ; 32: trunc.w.s $f[[R0:[0-9]+]], $f{{[0-9]+}}
10 ; 32: swc1 $f[[R0]],
20 ; 32: trunc.w.d $f[[R0:[0-9]+]], $f{{[0-9]+}}
21 ; 32: swc1 $f[[R0]],
23 ; 64: trunc.w.d $f[[R0:[0-9]+]], $f{{[0-9]+}}
24 ; 64: swc1 $f[[R0]],
34 ; 64: trunc.l.s $f[[R0:[0-9]+]], $f{{[0-9]+}}
35 ; 64: sdc1 $f[[R0]],
45 ; 64: trunc.l.d $f[[R0:[0-9]+]], $f{{[0-9]+}}
46 ; 64: sdc1 $f[[R0]],
/external/boringssl/src/ssl/test/runner/poly1305/
Dpoly1305_arm.s38 MOVM.IA.W [R2-R6], (R0)
44 MOVM.IA.W [R2-R6], (R0)
46 MOVM.IA [R2-R6], (R0)
63 MOVW R0, 36(R13)
68 MOVW 56(R0), R8
74 MOVM.IA (R0), [R0-R9]
75 MOVM.IA [R0-R4], (g)
82 MOVW_UNALIGNED(R14, g, R0, 0)
83 MOVW_UNALIGNED(R14, g, R0, 4)
84 MOVW_UNALIGNED(R14, g, R0, 8)
[all …]
/external/llvm/test/CodeGen/ARM/
Dsat-arith.ll6 ; CHECK-DAG: mov{{s?}} [[R0:.*]], #8
8 ; CHECK-ARM: qadd [[R0]], [[R1]], [[R0]]
9 ; CHECK-THRUMB: qadd [[R0]], [[R0]], [[R1]]
16 ; CHECK-DAG: mov{{s?}} [[R0:.*]], #8
18 ; CHECK-ARM: qsub [[R0]], [[R1]], [[R0]]
19 ; CHECK-THRUMB: qadd [[R0]], [[R1]], [[R0]]
27 ; CHECK: mov{{s?}} [[R0:.*]], #128
28 ; CHECK: ssat [[R1:.*]], #32, [[R0]]
36 ; CHECK: mov{{s?}} [[R0:.*]], #128
37 ; CHECK: ssat [[R1:.*]], #1, [[R0]]
[all …]
Dstack_guard_remat.ll9 ;PIC: ldr [[R0:r[0-9]+]], [[LABEL0:LCPI[0-9_]+]]
11 ;PIC: add [[R1:r[0-9]+]], pc, [[R0]]
19 ;NO-PIC: ldr [[R0:r[0-9]+]], [[LABEL0:LCPI[0-9_]+]]
21 ;NO-PIC: ldr {{r[0-9]+}}, {{\[}}[[R0]]{{\]}}
29 ;PIC-V7: movw [[R0:r[0-9]+]], :lower16:(L___stack_chk_guard$non_lazy_ptr-([[LABEL0:LPC[0-9_]+]]+8…
30 ;PIC-V7: movt [[R0]], :upper16:(L___stack_chk_guard$non_lazy_ptr-([[LABEL0]]+8))
32 ;PIC-V7: ldr [[R0]], {{\[}}pc, [[R0]]{{\]}}
33 ;PIC-V7: ldr [[R0]], {{\[}}[[R0]]{{\]}}
38 ;STATIC-V7: movw [[R0:r[0-9]+]], :lower16:___stack_chk_guard
39 ;STATIC-V7: movt [[R0]], :upper16:___stack_chk_guard
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/
DMBlazeInstrFPU.td141 (Select_CC (ADDIK (i32 R0), 1), (ADDIK (i32 R0), 0),
144 (Select_CC (ADDIK (i32 R0), 1), (ADDIK (i32 R0), 0),
147 (Select_CC (ADDIK (i32 R0), 1), (ADDIK (i32 R0), 0),
150 (Select_CC (ADDIK (i32 R0), 1), (ADDIK (i32 R0), 0),
154 (Select_CC (ADDIK (i32 R0), 1), (ADDIK (i32 R0), 0),
158 (Select_CC (ADDIK (i32 R0), 1), (ADDIK (i32 R0), 0),
161 (Select_CC (ADDIK (i32 R0), 1), (ADDIK (i32 R0), 0),
164 (Select_CC (ADDIK (i32 R0), 1), (ADDIK (i32 R0), 0),
167 (Select_CC (ADDIK (i32 R0), 1), (ADDIK (i32 R0), 0),
170 (Select_CC (ADDIK (i32 R0), 1), (ADDIK (i32 R0), 0),
[all …]
/external/swiftshader/third_party/LLVM/test/CodeGen/PTX/
Dld.ll136 ;CHECK: shl.b32 %r[[R0:[0-9]+]], %r{{[0-9]+}}, 1;
137 ;CHECK: add.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, %r[[R0]];
146 ;CHECK: shl.b32 %r[[R0:[0-9]+]], %r{{[0-9]+}}, 2;
147 ;CHECK: add.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, %r[[R0]];
156 ;CHECK: shl.b32 %r[[R0:[0-9]+]], %r{{[0-9]+}}, 3;
157 ;CHECK: add.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, %r[[R0]];
166 ;CHECK: shl.b32 %r[[R0:[0-9]+]], %r{{[0-9]+}}, 2;
167 ;CHECK: add.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, %r[[R0]];
176 ;CHECK: shl.b32 %r[[R0:[0-9]+]], %r{{[0-9]+}}, 3;
177 ;CHECK: add.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, %r[[R0]];
[all …]
Dst.ll136 ;CHECK: shl.b32 %r[[R0:[0-9]+]], %r{{[0-9]+}}, 1;
137 ;CHECK: add.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, %r[[R0]];
147 ;CHECK: shl.b32 %r[[R0:[0-9]+]], %r{{[0-9]+}}, 2;
148 ;CHECK: add.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, %r[[R0]];
158 ;CHECK: shl.b32 %r[[R0:[0-9]+]], %r{{[0-9]+}}, 3;
159 ;CHECK: add.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, %r[[R0]];
169 ;CHECK: shl.b32 %r[[R0:[0-9]+]], %r{{[0-9]+}}, 2;
170 ;CHECK: add.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, %r[[R0]];
180 ;CHECK: shl.b32 %r[[R0:[0-9]+]], %r{{[0-9]+}}, 3;
181 ;CHECK: add.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, %r[[R0]];
[all …]
/external/llvm/unittests/IR/
DMDBuilderTest.cpp48 MDNode *R0 = MDHelper.createRange(A, A); in TEST_F() local
50 EXPECT_EQ(R0, (MDNode *)nullptr); in TEST_F()
62 MDNode *R0 = MDHelper.createAnonymousTBAARoot(); in TEST_F() local
64 EXPECT_NE(R0, R1); in TEST_F()
65 EXPECT_GE(R0->getNumOperands(), 1U); in TEST_F()
67 EXPECT_EQ(R0->getOperand(0), R0); in TEST_F()
69 EXPECT_TRUE(R0->getNumOperands() == 1 || R0->getOperand(1) == nullptr); in TEST_F()
74 MDNode *R0 = MDHelper.createTBAARoot("Root"); in TEST_F() local
76 EXPECT_EQ(R0, R1); in TEST_F()
77 EXPECT_GE(R0->getNumOperands(), 1U); in TEST_F()
[all …]
/external/llvm/test/CodeGen/NVPTX/
Dconvert-int-sm20.ll11 ; CHECK: ld.param.u16 %r[[R0:[0-9]+]], [cvt_i16_i32_param_{{[0-9]+}}]
12 ; CHECK: st.param.b32 [func_retval{{[0-9]+}}+0], %r[[R0]]
19 ; CHECK: ld.param.u16 %r[[R0:[0-9]+]], [cvt_i16_i64_param_{{[0-9]+}}]
20 ; CHECK: st.param.b32 [func_retval{{[0-9]+}}+0], %r[[R0]]
31 ; CHECK: ld.param.u16 %r[[R0:[0-9]+]], [cvt_i32_i16_param_{{[0-9]+}}]
32 ; CHECK: st.param.b32 [func_retval{{[0-9]+}}+0], %r[[R0]]
39 ; CHECK: ld.param.u32 %r[[R0:[0-9]+]], [cvt_i32_i64_param_{{[0-9]+}}]
40 ; CHECK: st.param.b32 [func_retval{{[0-9]+}}+0], %r[[R0]]
51 ; CHECK: ld.param.u16 %rd[[R0:[0-9]+]], [cvt_i64_i16_param_{{[0-9]+}}]
52 ; CHECK: st.param.b64 [func_retval{{[0-9]+}}+0], %rd[[R0]]
[all …]
/external/llvm/test/CodeGen/Mips/cstmaterialization/
Dstack.ll19 ; CHECK-MIPS32: lui $[[R0:[0-9]+]], 16
20 ; CHECK-MIPS32: addiu $[[R0]], $[[R0]], 24
21 ; CHECK-MIPS32: subu $sp, $sp, $[[R0]]
27 ; CHECK-MIPS64: lui $[[R0:[0-9]+]], 1
28 ; CHECK-MIPS64: daddiu $[[R0]], $[[R0]], 32
29 ; CHECK-MIPS64: dsubu $sp, $sp, $[[R0]]
44 ; CHECK-MIPSN32: lui $[[R0:[0-9]+]], 16
45 ; CHECK-MIPSN32: addiu $[[R0]], $[[R0]], 16
46 ; CHECK-MIPSN32: subu $sp, $sp, $[[R0]]
/external/boringssl/src/crypto/md4/
Dmd4.c119 #define R0(a, b, c, d, k, s, t) \ macro
152 R0(A, B, C, D, X0, 3, 0); in md4_block_data_order()
155 R0(D, A, B, C, X1, 7, 0); in md4_block_data_order()
158 R0(C, D, A, B, X2, 11, 0); in md4_block_data_order()
161 R0(B, C, D, A, X3, 19, 0); in md4_block_data_order()
164 R0(A, B, C, D, X4, 3, 0); in md4_block_data_order()
167 R0(D, A, B, C, X5, 7, 0); in md4_block_data_order()
170 R0(C, D, A, B, X6, 11, 0); in md4_block_data_order()
173 R0(B, C, D, A, X7, 19, 0); in md4_block_data_order()
176 R0(A, B, C, D, X8, 3, 0); in md4_block_data_order()
[all …]

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