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Searched refs:Ra (Results 1 – 25 of 62) sorted by relevance

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/external/swiftshader/third_party/LLVM/lib/Target/Alpha/
DAlphaInstrFormats.td47 bits<5> Ra;
51 let Inst{25-21} = Ra;
57 bits<5> Ra;
61 let Inst{25-21} = Ra;
76 bits<5> Ra;
83 let Inst{25-21} = Ra;
91 bits<5> Ra;
98 let Inst{25-21} = Ra;
113 bits<5> Ra;
116 let Inst{25-21} = Ra;
[all …]
DAlphaInstrInfo.td394 let isReturn = 1, isTerminator = 1, isBarrier = 1, Ra = 31, Rb = 26, disp = 1, Uses = [R26] in {
399 let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1, Ra = 31, disp = 0 in
403 let isCall = 1, Ra = 26,
411 let isCall = 1, Ra = 26, Rb = 27, disp = 0,
420 let isCall = 1, Ra = 23, Rb = 27, disp = 0,
855 let Ra = 31, isBarrier = 1 in
/external/llvm/lib/Target/AArch64/
DAArch64PBQPRegAlloc.cpp160 unsigned Ra) { in addIntraChainConstraint() argument
161 if (Rd == Ra) in addIntraChainConstraint()
166 if (TRI->isPhysicalRegister(Rd) || TRI->isPhysicalRegister(Ra)) { in addIntraChainConstraint()
169 DEBUG(dbgs() << "Ra is a physical reg:" << TRI->isPhysicalRegister(Ra) in addIntraChainConstraint()
175 PBQPRAGraph::NodeId node2 = G.getMetadata().getNodeIdForVReg(Ra); in addIntraChainConstraint()
188 const LiveInterval &la = LIs.getInterval(Ra); in addIntraChainConstraint()
244 unsigned Ra) { in addInterChainConstraint() argument
248 if (Chains.count(Ra)) { in addInterChainConstraint()
249 if (Rd != Ra) { in addInterChainConstraint()
250 DEBUG(dbgs() << "Moving acc chain from " << PrintReg(Ra, TRI) << " to " in addInterChainConstraint()
[all …]
DAArch64PBQPRegAlloc.h31 bool addIntraChainConstraint(PBQPRAGraph &G, unsigned Rd, unsigned Ra);
34 void addInterChainConstraint(PBQPRAGraph &G, unsigned Rd, unsigned Ra);
DAArch64InstrInfo.td768 def : Pat<(i64 (add (mul (sext GPR32:$Rn), (s64imm_32bit:$C)), GPR64:$Ra)),
769 (SMADDLrrr GPR32:$Rn, (MOVi32imm (trunc_imm imm:$C)), GPR64:$Ra)>;
770 def : Pat<(i64 (add (mul (zext GPR32:$Rn), (i64imm_32bit:$C)), GPR64:$Ra)),
771 (UMADDLrrr GPR32:$Rn, (MOVi32imm (trunc_imm imm:$C)), GPR64:$Ra)>;
773 GPR64:$Ra)),
775 (MOVi32imm (trunc_imm imm:$C)), GPR64:$Ra)>;
777 def : Pat<(i64 (sub GPR64:$Ra, (mul (sext GPR32:$Rn), (s64imm_32bit:$C)))),
778 (SMSUBLrrr GPR32:$Rn, (MOVi32imm (trunc_imm imm:$C)), GPR64:$Ra)>;
779 def : Pat<(i64 (sub GPR64:$Ra, (mul (zext GPR32:$Rn), (i64imm_32bit:$C)))),
780 (UMSUBLrrr GPR32:$Rn, (MOVi32imm (trunc_imm imm:$C)), GPR64:$Ra)>;
[all …]
/external/boringssl/src/crypto/ec/asm/
Dp256-x86_64-asm.pl949 my ($ONE,$INDEX,$Ra,$Rb,$Rc,$Rd,$Re,$Rf)=map("%xmm$_",(0..7));
985 pxor $Ra, $Ra
1012 por $T0a, $Ra
1026 movdqu $Ra, 16*0($val)
1082 pxor $Ra, $Ra
1103 por $T0a, $Ra
1114 movdqu $Ra, 16*0($val)
1140 my ($TWO,$INDEX,$Ra,$Rb,$Rc)=map("%ymm$_",(0..4));
1171 vpxor $Ra, $Ra, $Ra
1179 vpermd $INDEX, $Ra, $INDEX
[all …]
/external/icu/icu4c/source/data/lang/
Dis.txt620 non-ignorable{"Raða táknum"}
621 shifted{"Raða óháð táknum"}
624 no{"Raða áherslum eðlilega"}
625 yes{"Raða öfugt eftir áherslum"}
628 lower{"Raða lágstöfum fyrst"}
629 no{"Raða eðlilega eftir hástöfum og lágstöfum"}
630 upper{"Raða hástöfum fyrst"}
633 no{"Raða óháð hástöfum og lágstöfum"}
634 yes{"Raða stafrétt"}
637 no{"Raða án stöðlunar"}
[all …]
Dhr.txt752 account{"Računovodstveni format valute"}
900 POSIX{"Računalo"}
/external/harfbuzz_ng/src/
Dhb-ot-shape-complex-indic-machine.rl57 Ra = 16;
61 c = (C | Ra); # is_consonant
65 reph = (Ra H | Repha); # possible reph
68 forced_rakar = ZWJ H ZWJ Ra;
Dhb-ot-shape-complex-myanmar-machine.rl63 Ra = 16;
67 k = (Ra As H); # Kinzi
69 c = C|Ra; # is_consonant
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMInstrThumb2.td461 bits<4> Ra;
464 let Inst{15-12} = Ra;
2014 (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), NoItinerary,
2015 "usada8", "\t$Rd, $Rn, $Rm, $Ra", []>,
2316 let Inst{15-12} = 0b1111; // Ra = 0b1111 (no accumulate)
2321 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32,
2322 "mla", "\t$Rd, $Rn, $Rm, $Ra",
2323 [(set rGPR:$Rd, (add (mul rGPR:$Rn, rGPR:$Rm), rGPR:$Ra))]> {
2331 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32,
2332 "mls", "\t$Rd, $Rn, $Rm, $Ra",
[all …]
DARMInstrInfo.td3232 def USADA8 : AI<(outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm, GPR:$Ra),
3234 "\t$Rd, $Rn, $Rm, $Ra", []>,
3239 bits<4> Ra;
3243 let Inst{15-12} = Ra;
3464 def MLA : AsMul1I32<0b0000001, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm, GPR:$Ra),
3465 IIC_iMAC32, "mla", "\t$Rd, $Rn, $Rm, $Ra",
3466 [(set GPR:$Rd, (add (mul GPR:$Rn, GPR:$Rm), GPR:$Ra))]>,
3468 bits<4> Ra;
3469 let Inst{15-12} = Ra;
3474 (ins GPR:$Rn, GPR:$Rm, GPR:$Ra, pred:$p, cc_out:$s),
[all …]
DARMInstrFormats.td717 // MSW multiple w/ Ra operand
721 bits<4> Ra;
722 let Inst{15-12} = Ra;
747 // AMulxyI with Ra operand
751 bits<4> Ra;
752 let Inst{15-12} = Ra;
/external/llvm/test/CodeGen/ARM/
Dfast-isel-vararg.ll25 ; ARM: ldr [[Ra:r[0-9]+]], [sp, #16]
27 ; ARM: str [[Ra]], [sp]
/external/llvm/lib/Target/ARM/
DARMInstrThumb2.td530 bits<4> Ra;
533 let Inst{15-12} = Ra;
2219 (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), NoItinerary,
2220 "usada8", "\t$Rd, $Rn, $Rm, $Ra", []>,
2543 let Inst{15-12} = 0b1111; // Ra = 0b1111 (no accumulate)
2548 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32,
2549 "mla", "\t$Rd, $Rn, $Rm, $Ra",
2550 [(set rGPR:$Rd, (add (mul rGPR:$Rn, rGPR:$Rm), rGPR:$Ra))]>,
2559 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32,
2560 "mls", "\t$Rd, $Rn, $Rm, $Ra",
[all …]
DARMInstrInfo.td3633 def USADA8 : AI<(outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm, GPR:$Ra),
3635 "\t$Rd, $Rn, $Rm, $Ra", []>,
3640 bits<4> Ra;
3644 let Inst{15-12} = Ra;
3881 (ins GPRnopc:$Rn, GPRnopc:$Rm, GPRnopc:$Ra),
3882 IIC_iMAC32, "mla", "\t$Rd, $Rn, $Rm, $Ra",
3883 [(set GPRnopc:$Rd, (add (mul GPRnopc:$Rn, GPRnopc:$Rm), GPRnopc:$Ra))]>,
3885 bits<4> Ra;
3886 let Inst{15-12} = Ra;
3891 (ins GPRnopc:$Rn, GPRnopc:$Rm, GPRnopc:$Ra,
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/Blackfin/
DBlackfinRegisterInfo.td50 // Ra 40-bit accumulator registers
51 class Ra<bits<3> num, string n, list<Register> subs> : BlackfinReg<n> {
165 def A0 : Ra <0, "a0", [A0X, A0W]>;
170 def A1 : Ra <2, "a1", [A1X, A1W]>;
/external/v8/src/arm64/
Ddisasm-arm64.h61 return (instr->Ra() == kZeroRegCode); in RaIsZROrSP()
Dsimulator-arm64.cc2144 result = xreg(instr->Ra()) + (xreg(instr->Rn()) * xreg(instr->Rm())); in VisitDataProcessing3Source()
2148 result = xreg(instr->Ra()) - (xreg(instr->Rn()) * xreg(instr->Rm())); in VisitDataProcessing3Source()
2150 case SMADDL_x: result = xreg(instr->Ra()) + (rn_s32 * rm_s32); break; in VisitDataProcessing3Source()
2151 case SMSUBL_x: result = xreg(instr->Ra()) - (rn_s32 * rm_s32); break; in VisitDataProcessing3Source()
2152 case UMADDL_x: result = xreg(instr->Ra()) + (rn_u32 * rm_u32); break; in VisitDataProcessing3Source()
2153 case UMSUBL_x: result = xreg(instr->Ra()) - (rn_u32 * rm_u32); break; in VisitDataProcessing3Source()
2155 DCHECK(instr->Ra() == kZeroRegCode); in VisitDataProcessing3Source()
2969 unsigned fa = instr->Ra(); in VisitFPDataProcessing3Source()
/external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/org.eclipse.pde.build_3.6.1.R36x_v20100823/META-INF/
DECLIPSEF.SF25 SHA1-Digest: Ra/buYWq+UnCJcPzA5sz41d/1Wo=
/external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/pkb/fr-FR/
Dfr-FR_nk0_kpdf_dur.pkb6 …�@!����B����1�C�q"RA�@tB!aA�������0q#C�%2� ��42 A�0!� �q!Ra!B� �@ 0b2a1q…
/external/svox/pico/tests/data/
Dxsampa_pico_man_de-DE.txt56 # TEST R Rabe "Ra:.b@
57 <speak xml:lang="de-DE"> Ich teste <phoneme alphabet="xsampa" ph="&#34;Ra:.b@"/>.</speak>
/external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/pkb/en-US/
Den-US_lh0_kpdf_dur.pkb84 �xp�pp�X��I���Ra�Q�jp�pA�A� �@P3`#!�1��"�p1qa�a�A� �!��
Den-US_lh0_kpdf_lfz.pkb108 ��2����tF���Ra�Q��� r( ���h�������,����� 4�n��
/external/icu/icu4j/demos/src/com/ibm/icu/dev/demo/translit/resources/
DTransliterator_Kanji_OnRomaji.txt4049 羅>Ra;
4582 蘿>Ra;
4676 螺>Ra;
4769 裸>Ra;
5353 邏>Ra;
5576 鑼>Ra;
5930 騾>Ra;

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