Searched refs:SPSR_abt (Results 1 – 8 of 8) sorted by relevance
/external/llvm/test/MC/ARM/ |
D | move-banked-regs.s | 76 @ CHECK-ARM: mrs r9, SPSR_abt @ encoding: [0x00,0x93,0x44,0xe1] 79 @ CHECK-THUMB: mrs r9, SPSR_abt @ encoding: [0xf4,0xf3,0x30,0x89] 186 @ CHECK-ARM: msr SPSR_abt, r9 @ encoding: [0x09,0xf3,0x64,0xe1] 189 @ CHECK-THUMB: msr SPSR_abt, r9 @ encoding: [0x99,0xf3,0x30,0x84]
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/external/llvm/test/MC/Disassembler/ARM/ |
D | move-banked-regs-arm.txt | 55 @ CHECK: mrs r9, SPSR_abt 129 @ CHECK: msr SPSR_abt, r9
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D | move-banked-regs-thumb.txt | 54 @ CHECK: mrs r9, SPSR_abt 131 @ CHECK: msr SPSR_abt, r9
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/external/vixl/src/aarch32/ |
D | instructions-aarch32.cc | 348 case SPSR_abt: in GetName()
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D | instructions-aarch32.h | 816 SPSR_abt = 0x34, enumerator
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/external/llvm/test/MC/AArch64/ |
D | basic-a64-instructions.s | 3824 msr SPSR_abt, x12 4372 mrs x9, SPSR_abt
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/external/llvm/lib/Target/AArch64/ |
D | AArch64SystemOperands.td | 575 def : RWSysReg<"SPSR_abt", 0b11, 0b100, 0b0100, 0b0011, 0b001>;
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | basic-a64-instructions.txt | 3297 # CHECK: msr {{SPSR_abt|SPSR_ABT}}, x12 3589 # CHECK: mrs x9, {{SPSR_abt|SPSR_ABT}}
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