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Searched refs:SRegs (Results 1 – 2 of 2) sorted by relevance

/external/llvm/lib/Target/Hexagon/
DHexagonFrameLowering.cpp1245 BitVector SRegs(Hexagon::NUM_TARGET_REGS); in assignCalleeSavedSpillSlots() local
1258 SRegs[*SR] = true; in assignCalleeSavedSpillSlots()
1261 DEBUG(dbgs() << "SRegs.1: "; dump_registers(SRegs, *TRI); dbgs() << "\n"); in assignCalleeSavedSpillSlots()
1269 SRegs[*SR] = false; in assignCalleeSavedSpillSlots()
1272 DEBUG(dbgs() << "SRegs.2: "; dump_registers(SRegs, *TRI); dbgs() << "\n"); in assignCalleeSavedSpillSlots()
1279 for (int x = SRegs.find_first(); x >= 0; x = SRegs.find_next(x)) { in assignCalleeSavedSpillSlots()
1296 SRegs |= TmpSup; in assignCalleeSavedSpillSlots()
1297 DEBUG(dbgs() << "SRegs.4: "; dump_registers(SRegs, *TRI); dbgs() << "\n"); in assignCalleeSavedSpillSlots()
1301 for (int x = SRegs.find_first(); x >= 0; x = SRegs.find_next(x)) { in assignCalleeSavedSpillSlots()
1304 if (!SRegs[*SR]) in assignCalleeSavedSpillSlots()
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/external/llvm/lib/Target/AMDGPU/
DSIInstrInfo.cpp2173 SmallVector<unsigned, 8> SRegs; in readlaneVGPRToSGPR() local
2179 SRegs.push_back(SGPR); in readlaneVGPRToSGPR()
2186 MIB.addReg(SRegs[i]); in readlaneVGPRToSGPR()