Searched refs:SrcLo (Results 1 – 3 of 3) sorted by relevance
566 const MachineOperand &SrcLo = I->getOperand(1), &SrcHi = I->getOperand(2); in expandPseudoMTLoHi() local580 LoInst.addReg(SrcLo.getReg(), getKillRegState(SrcLo.isKill())); in expandPseudoMTLoHi()
1278 unsigned SrcLo = HRI.getSubReg(Op2.getReg(), Hexagon::subreg_loreg); in expandPostRAPseudo() local1284 .addReg(SrcLo); in expandPostRAPseudo()1285 SrcLo = HRI.getSubReg(Op3.getReg(), Hexagon::subreg_loreg); in expandPostRAPseudo()1291 .addReg(SrcLo); in expandPostRAPseudo()
1550 unsigned SrcLo = HRI.getSubReg(SrcR, Hexagon::subreg_loreg); in expandStoreVec2() local1574 .addReg(SrcLo, getKillRegState(IsKill)) in expandStoreVec2()