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Searched refs:TGSI_OPCODE_CLAMP (Results 1 – 11 of 11) sorted by relevance

/external/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_util.c199 case TGSI_OPCODE_CLAMP: in tgsi_util_get_inst_usage_mask()
Dtgsi_info.c65 { 1, 3, 0, 0, 0, 0, COMP, "CLAMP", TGSI_OPCODE_CLAMP },
Dtgsi_exec.c3544 case TGSI_OPCODE_CLAMP: in exec_instruction()
/external/mesa3d/src/gallium/include/pipe/
Dp_shader_tokens.h282 #define TGSI_OPCODE_CLAMP 25 macro
/external/mesa3d/src/gallium/drivers/r300/
Dr300_tgsi_to_rc.c58 case TGSI_OPCODE_CLAMP: return RC_OPCODE_CLAMP; in translate_opcode()
/external/mesa3d/src/gallium/drivers/radeon/
Dradeon_setup_tgsi_llvm.c322 value = lp_build_emit_llvm(bld_base, TGSI_OPCODE_CLAMP, in emit_store()
1116 bld_base->op_actions[TGSI_OPCODE_CLAMP].emit = build_tgsi_intrinsic_nomem; in radeon_llvm_context_init()
1117 bld_base->op_actions[TGSI_OPCODE_CLAMP].intr_name = "llvm.AMDIL.clamp."; in radeon_llvm_context_init()
/external/mesa3d/src/gallium/auxiliary/gallivm/
Dlp_bld_tgsi_aos.c607 case TGSI_OPCODE_CLAMP: in lp_emit_instruction_aos()
Dlp_bld_tgsi_action.c807 bld_base->op_actions[TGSI_OPCODE_CLAMP].emit = clamp_emit; in lp_set_default_actions()
/external/mesa3d/src/gallium/drivers/r600/
Dr600_shader.c5267 {TGSI_OPCODE_CLAMP, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
5441 {TGSI_OPCODE_CLAMP, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
5615 {TGSI_OPCODE_CLAMP, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
/external/mesa3d/src/gallium/drivers/nv50/codegen/
Dnv50_ir_from_tgsi.cpp1987 case TGSI_OPCODE_CLAMP: in handleInstruction()
/external/mesa3d/src/gallium/drivers/svga/
Dsvga_tgsi_insn.c2654 case TGSI_OPCODE_CLAMP: in svga_emit_instruction()