Searched refs:TruncMask (Results 1 – 4 of 4) sorted by relevance
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 1326 SDValue TruncMask = DAG.getConstant((UINT64_C(1) << DivBits) - 1, DL, VT); in LowerDIVREM24() local
1327 Div = DAG.getNode(ISD::AND, DL, VT, Div, TruncMask); in LowerDIVREM24()
1328 Rem = DAG.getNode(ISD::AND, DL, VT, Rem, TruncMask); in LowerDIVREM24()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 1716 APInt TruncMask = NewMask.zext(OperandBitWidth); in SimplifyDemandedBits() local
1717 if (SimplifyDemandedBits(Op.getOperand(0), TruncMask, in SimplifyDemandedBits()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 1039 APInt TruncMask = NewMask.zext(OperandBitWidth); in SimplifyDemandedBits() local
1040 if (SimplifyDemandedBits(Op.getOperand(0), TruncMask, in SimplifyDemandedBits()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 7393 uint64_t TruncMask = N->getConstantOperandVal(1); in isDesirableToCommuteWithShift() local
7394 if (isMask_64(TruncMask) && in isDesirableToCommuteWithShift()
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