| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDGPUISelLowering.cpp | 196 SDValue RCP_LO = DAG.getNode(ISD::UMULO, DL, VT, RCP, Den); in LowerUDIVREM()
227 SDValue Num_S_Remainder = DAG.getNode(ISD::UMULO, DL, VT, Quotient, Den); in LowerUDIVREM()
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| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 232 SMULO, UMULO, enumerator
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 238 SMULO, UMULO, enumerator
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 233 case ISD::UMULO: return "umulo"; in getOperationName()
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| D | LegalizeIntegerTypes.cpp | 137 case ISD::UMULO: Res = PromoteIntRes_XMULO(N, ResNo); break; in PromoteIntegerResult()
786 if (N->getOpcode() == ISD::UMULO) { in PromoteIntRes_XMULO()
1401 case ISD::UMULO: in ExpandIntegerResult()
2548 if (N->getOpcode() == ISD::UMULO) { in ExpandIntRes_XMULO()
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| D | SelectionDAG.cpp | 2129 case ISD::UMULO: in computeKnownBits()
2620 case ISD::UMULO: in ComputeNumSignBits()
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| D | LegalizeDAG.cpp | 3375 case ISD::UMULO: in ExpandNode()
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| D | SelectionDAGBuilder.cpp | 5511 case Intrinsic::umul_with_overflow: Op = ISD::UMULO; break; in visitIntrinsicCall()
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| D | DAGCombiner.cpp | 1370 case ISD::UMULO: return visitUMULO(N); in visit()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | LegalizeIntegerTypes.cpp | 119 case ISD::UMULO: Res = PromoteIntRes_XMULO(N, ResNo); break; in PromoteIntegerResult()
659 if (N->getOpcode() == ISD::UMULO) { in PromoteIntRes_XMULO()
1156 case ISD::UMULO: in ExpandIntegerResult()
2250 if (N->getOpcode() == ISD::UMULO) { in ExpandIntRes_XMULO()
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| D | SelectionDAG.cpp | 1738 case ISD::UMULO: in ComputeMaskedBits()
2173 case ISD::UMULO: in ComputeNumSignBits()
6023 case ISD::UMULO: return "umulo"; in getOperationName()
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| D | LegalizeDAG.cpp | 861 case ISD::UMULO: in LegalizeOp()
3598 case ISD::UMULO: in ExpandNode()
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| D | SelectionDAGBuilder.cpp | 5091 return implVisitAluOverflow(I, ISD::UMULO); in visitIntrinsicCall()
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| D | DAGCombiner.cpp | 1064 case ISD::UMULO: return visitUMULO(N); in visit()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1707 setOperationAction(ISD::UMULO, MVT::i64, Custom); in SparcTargetLowering()
2961 assert((opcode == ISD::UMULO || opcode == ISD::SMULO) && "Invalid Opcode."); in LowerUMULO_SMULO()
3081 case ISD::UMULO: in LowerOperation()
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| /external/llvm/test/CodeGen/X86/ |
| D | xaluo.ll | 344 ; UMULO
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| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 884 setOperationAction(ISD::UMULO, VT, Expand); in initActions()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 249 setOperationAction(ISD::UMULO, MVT::i32, Custom); in AArch64TargetLowering()
250 setOperationAction(ISD::UMULO, MVT::i64, Custom); in AArch64TargetLowering()
1645 case ISD::UMULO: { in getAArch64XALUOOp()
2347 case ISD::UMULO: in LowerOperation()
3639 Opc == ISD::USUBO || Opc == ISD::SMULO || Opc == ISD::UMULO)) { in LowerBR_CC()
4088 Opc == ISD::USUBO || Opc == ISD::SMULO || Opc == ISD::UMULO)) { in LowerSELECT()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 1123 setOperationAction(ISD::UMULO, VT, Custom); in X86TargetLowering()
1128 setOperationAction(ISD::UMULO, MVT::i8, Expand); in X86TargetLowering()
10091 case ISD::UMULO: { // i64, i8 = umulo lhs, rhs --> i64, i64, i32 umul lhs,rhs in LowerXALUO()
10446 case ISD::UMULO: return LowerXALUO(Op, DAG); in LowerOperation()
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