/external/libhevc/common/arm/ |
D | ihevc_sao_band_offset_chroma.s | 170 VAND.U8 D4,D4,D13 @band_table.val[3] = vand_u8(band_table.val[3], au1_cmp) 180 VAND.U8 D3,D3,D14 @band_table.val[2] = vand_u8(band_table.val[2], au1_cmp) 189 VAND.U8 D2,D2,D15 @band_table.val[1] = vand_u8(band_table.val[1], au1_cmp) 197 VAND.U8 D1,D1,D16 @band_table.val[0] = vand_u8(band_table.val[0], au1_cmp) 244 VAND.U8 D12,D12,D17 @band_table.val[3] = vand_u8(band_table.val[3], au1_cmp) 254 VAND.U8 D11,D11,D18 @band_table.val[2] = vand_u8(band_table.val[2], au1_cmp) 264 VAND.U8 D10,D10,D19 @band_table.val[1] = vand_u8(band_table.val[1], au1_cmp) 272 VAND.U8 D9,D9,D20 @band_table.val[0] = vand_u8(band_table.val[0], au1_cmp)
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D | ihevc_sao_band_offset_luma.s | 156 VAND.U8 D4,D4,D12 @band_table.val[3] = vand_u8(band_table.val[3], au1_cmp) 166 VAND.U8 D3,D3,D11 @band_table.val[2] = vand_u8(band_table.val[2], au1_cmp) 176 VAND.U8 D2,D2,D10 @band_table.val[1] = vand_u8(band_table.val[1], au1_cmp) 183 VAND.U8 D1,D1,D9 @band_table.val[0] = vand_u8(band_table.val[0], au1_cmp)
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D | ihevc_sao_edge_offset_class0_chroma.s | 210 VAND Q7,Q7,Q4 @edge_idx = vandq_s8(edge_idx, au1_mask) 229 VAND Q12,Q12,Q4 @II edge_idx = vandq_s8(edge_idx, au1_mask) 375 VAND Q7,Q7,Q4 @edge_idx = vandq_s8(edge_idx, au1_mask) 395 VAND Q14,Q14,Q4 @II edge_idx = vandq_s8(edge_idx, au1_mask)
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D | ihevc_sao_edge_offset_class0.s | 209 VAND Q7,Q7,Q4 @edge_idx = vandq_s8(edge_idx, au1_mask) 223 VAND Q14,Q14,Q4 @II edge_idx = vandq_s8(edge_idx, au1_mask) 315 VAND Q12,Q12,Q4 @edge_idx = vandq_s8(edge_idx, au1_mask)
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D | ihevc_sao_edge_offset_class2.s | 303 VAND Q9,Q9,Q4 @I edge_idx = vandq_s8(edge_idx, au1_mask) 389 VAND Q11,Q11,Q4 @II edge_idx = vandq_s8(edge_idx, au1_mask) 404 VAND Q9,Q9,Q4 @III edge_idx = vandq_s8(edge_idx, au1_mask) 479 VAND Q9,Q9,Q4 @edge_idx = vandq_s8(edge_idx, au1_mask) 616 VAND Q13,Q13,Q4 @edge_idx = vandq_s8(edge_idx, au1_mask) 747 VAND Q13,Q13,Q4 @edge_idx = vandq_s8(edge_idx, au1_mask)
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D | ihevc_sao_edge_offset_class3.s | 321 VAND Q9,Q9,Q4 @I edge_idx = vandq_s8(edge_idx, au1_mask) 417 VAND Q13,Q13,Q4 @II edge_idx = vandq_s8(edge_idx, au1_mask) 436 VAND Q9,Q9,Q4 @III edge_idx = vandq_s8(edge_idx, au1_mask) 516 VAND Q13,Q13,Q4 @edge_idx = vandq_s8(edge_idx, au1_mask) 657 VAND Q13,Q13,Q4 @edge_idx = vandq_s8(edge_idx, au1_mask) 799 VAND Q13,Q13,Q4 @edge_idx = vandq_s8(edge_idx, au1_mask)
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D | ihevc_sao_edge_offset_class3_chroma.s | 408 VAND Q9,Q9,Q4 @I edge_idx = vandq_s8(edge_idx, au1_mask) 520 VAND Q13,Q13,Q4 @II edge_idx = vandq_s8(edge_idx, au1_mask) 545 VAND Q9,Q9,Q4 @III edge_idx = vandq_s8(edge_idx, au1_mask) 638 VAND Q9,Q9,Q4 @edge_idx = vandq_s8(edge_idx, au1_mask) 815 VAND Q13,Q13,Q4 @edge_idx = vandq_s8(edge_idx, au1_mask) 989 VAND Q13,Q13,Q4 @edge_idx = vandq_s8(edge_idx, au1_mask)
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D | ihevc_sao_edge_offset_class2_chroma.s | 417 VAND Q11,Q9,Q4 @I edge_idx = vandq_s8(edge_idx, au1_mask) 518 VAND Q13,Q13,Q4 @II edge_idx = vandq_s8(edge_idx, au1_mask) 553 VAND Q9,Q9,Q4 @III edge_idx = vandq_s8(edge_idx, au1_mask) 638 VAND Q13,Q13,Q4 @edge_idx = vandq_s8(edge_idx, au1_mask) 789 VAND Q13,Q13,Q4 @edge_idx = vandq_s8(edge_idx, au1_mask) 937 VAND Q13,Q13,Q4 @edge_idx = vandq_s8(edge_idx, au1_mask)
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/external/llvm/test/MC/ARM/ |
D | directive-fpu-instrs.s | 4 VAND d3, d5, d5 define
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/external/libopus/celt/arm/ |
D | celt_pitch_xcorr_arm_gnu.s | 84 @ Unlike VMOV, VAND is a data processsing instruction (and doesn't get 112 VAND d4, d5, d5 define 129 @ Use VAND since it's a data processing instruction again.
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/external/llvm/test/CodeGen/AMDGPU/ |
D | store.ll | 92 ; SI: v_mov_b32_e32 [[VAND:v[0-9]+]], [[AND]] 93 ; SI: buffer_store_dword [[VAND]]
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/external/arm-neon-tests/ |
D | ref-rvct-neon.txt | 4719 VAND/VANDQ output: 4720 VAND/VANDQ:0:result_int8x8 [] = { 0, 0, 2, 2, 0, 0, 2, 2, } 4721 VAND/VANDQ:1:result_int16x4 [] = { fffffff0, fffffff0, fffffff0, fffffff0, } 4722 VAND/VANDQ:2:result_int32x2 [] = { 0, 1, } 4723 VAND/VANDQ:3:result_int64x1 [] = { 60, } 4724 VAND/VANDQ:4:result_uint8x8 [] = { 10, 10, 10, 10, 14, 14, 14, 14, } 4725 VAND/VANDQ:5:result_uint16x4 [] = { 10, 10, 12, 12, } 4726 VAND/VANDQ:6:result_uint32x2 [] = { 20, 20, } 4727 VAND/VANDQ:7:result_uint64x1 [] = { 0, } 4728 VAND/VANDQ:8:result_poly8x8 [] = { 33, 33, 33, 33, 33, 33, 33, 33, } [all …]
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D | ref-rvct-neon-nofp16.txt | 4405 VAND/VANDQ output: 4406 VAND/VANDQ:0:result_int8x8 [] = { 0, 0, 2, 2, 0, 0, 2, 2, } 4407 VAND/VANDQ:1:result_int16x4 [] = { fffffff0, fffffff0, fffffff0, fffffff0, } 4408 VAND/VANDQ:2:result_int32x2 [] = { 0, 1, } 4409 VAND/VANDQ:3:result_int64x1 [] = { 60, } 4410 VAND/VANDQ:4:result_uint8x8 [] = { 10, 10, 10, 10, 14, 14, 14, 14, } 4411 VAND/VANDQ:5:result_uint16x4 [] = { 10, 10, 12, 12, } 4412 VAND/VANDQ:6:result_uint32x2 [] = { 20, 20, } 4413 VAND/VANDQ:7:result_uint64x1 [] = { 0, } 4414 VAND/VANDQ:8:result_poly8x8 [] = { 33, 33, 33, 33, 33, 33, 33, 33, } [all …]
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D | ref-rvct-all.txt | 4719 VAND/VANDQ output: 4720 VAND/VANDQ:0:result_int8x8 [] = { 0, 0, 2, 2, 0, 0, 2, 2, } 4721 VAND/VANDQ:1:result_int16x4 [] = { fffffff0, fffffff0, fffffff0, fffffff0, } 4722 VAND/VANDQ:2:result_int32x2 [] = { 0, 1, } 4723 VAND/VANDQ:3:result_int64x1 [] = { 60, } 4724 VAND/VANDQ:4:result_uint8x8 [] = { 10, 10, 10, 10, 14, 14, 14, 14, } 4725 VAND/VANDQ:5:result_uint16x4 [] = { 10, 10, 12, 12, } 4726 VAND/VANDQ:6:result_uint32x2 [] = { 20, 20, } 4727 VAND/VANDQ:7:result_uint64x1 [] = { 0, } 4728 VAND/VANDQ:8:result_poly8x8 [] = { 33, 33, 33, 33, 33, 33, 33, 33, } [all …]
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D | expected_input4gcc-nofp16.txt | 4214 VAND/VANDQ output:
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/external/llvm/lib/Target/ARM/ |
D | ARMScheduleSwift.td | 544 "VPADDL", "VAND", "VBIC", "VEOR", "VORN", "VORR", "VTST",
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D | ARMScheduleA9.td | 2402 // VADD/VAND/VORR/VEOR/VBIC/VORN/VBIT/VBIF/VBSL
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D | ARMInstrNEON.td | 4847 // VAND : Vector Bitwise AND 7141 // VAND/VBIC/VEOR/VORR accept but do not require a type suffix.
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/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
D | PPCInstrAltivec.td | 323 def VAND : VXForm_1<1028, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB),
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/external/llvm/lib/Target/PowerPC/ |
D | PPCInstrAltivec.td | 510 def VAND : VXForm_1<1028, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB),
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/external/clang/include/clang/Basic/ |
D | arm_neon.td | 802 def VAND : LOpInst<"vand", "ddd", "csilUcUsUiUlQcQsQiQlQUcQUsQUiQUl", OP_AND>;
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMInstrNEON.td | 3725 // VAND : Vector Bitwise AND
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/external/llvm/lib/Target/X86/ |
D | X86InstrAVX512.td | 3962 defm VAND : avx512_fp_binop_p<0x54, "vand", X86fand, HasDQI, 1>;
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86InstrSSE.td | 2663 defm VAND : sse12_fp_packed_logical_y<0x54, "and", and>;
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/external/valgrind/none/tests/arm/ |
D | neon128.stdout.exp | 118 ---- VAND ----
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