| /external/vixl/examples/aarch32/ |
| D | pi.cc | 44 __ Vmov(d4, 8.0); in GenerateApproximatePi() local
45 __ Vmov(d5, 1.0); in GenerateApproximatePi() local
47 __ Vmov(I64, d10, 0); // d10 = 0.0; in GenerateApproximatePi() local
48 __ Vmov(I64, d11, 0); // d11 = 0.0; in GenerateApproximatePi() local
49 __ Vmov(I64, d12, 0); // d12 = 0.0; in GenerateApproximatePi() local
50 __ Vmov(I64, d13, 0); // d13 = 0.0 in GenerateApproximatePi() local
73 __ Vmov(F64, d4, 4.0); in GenerateApproximatePi() local
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| /external/vixl/test/aarch32/ |
| D | test-disasm-a32.cc | 2041 COMPARE_BOTH(Vmov(s0, 0.0f), in TEST()
2044 COMPARE_BOTH(Vmov(s1, 1.0f), "vmov.f32 s1, #1\n"); in TEST()
2045 COMPARE_BOTH(Vmov(s2, RawbitsToFloat(0x0000db6c)), in TEST()
2048 COMPARE_BOTH(Vmov(s3, RawbitsToFloat(0x327b23c6)), in TEST()
2052 COMPARE_BOTH(Vmov(s4, RawbitsToFloat(0xffcc7fff)), in TEST()
2055 COMPARE_BOTH(Vmov(s5, RawbitsToFloat(0xb72df575)), in TEST()
2060 COMPARE_BOTH(Vmov(d6, 0.0), "vmov.i64 d6, #0x0000000000000000\n"); in TEST()
2061 COMPARE_BOTH(Vmov(d7, 1.0), "vmov.f64 d7, #1\n"); in TEST()
2062 COMPARE_BOTH(Vmov(d8, RawbitsToDouble(0x000000000000af8e)), in TEST()
2067 COMPARE_BOTH(Vmov(d9, RawbitsToDouble(0x000070210000af8e)), in TEST()
[all …]
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| D | test-assembler-aarch32.cc | 1434 __ Vmov(d2, 4.1); in TEST() local
1435 __ Vmov(s8, 8.2); in TEST() local
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| /external/vixl/src/aarch32/ |
| D | macro-assembler-aarch32.h | 904 void Vmov(Condition cond, DRegister rt, double v) { Vmov(cond, F64, rt, v); } in Vmov() function
905 void Vmov(DRegister rt, double v) { Vmov(al, F64, rt, v); } in Vmov() function
906 void Vmov(Condition cond, SRegister rt, float v) { Vmov(cond, F32, rt, v); } in Vmov() function
907 void Vmov(SRegister rt, float v) { Vmov(al, F32, rt, v); } in Vmov() function
7820 void Vmov(Condition cond, Register rt, SRegister rn) { in Vmov() function
7829 void Vmov(Register rt, SRegister rn) { Vmov(al, rt, rn); } in Vmov() function
7831 void Vmov(Condition cond, SRegister rn, Register rt) { in Vmov() function
7840 void Vmov(SRegister rn, Register rt) { Vmov(al, rn, rt); } in Vmov() function
7842 void Vmov(Condition cond, Register rt, Register rt2, DRegister rm) { in Vmov() function
7852 void Vmov(Register rt, Register rt2, DRegister rm) { Vmov(al, rt, rt2, rm); } in Vmov() function
[all …]
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| /external/v8/src/crankshaft/arm/ |
| D | lithium-gap-resolver-arm.cc | 247 __ Vmov(result, v, ip); in EmitMove() local
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| D | lithium-codegen-arm.cc | 1744 __ Vmov(result, v, scratch0()); in DoConstantD() local
3339 __ Vmov(dot_five, 0.5, scratch0()); in DoMathRound() local
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| /external/v8/src/arm/ |
| D | macro-assembler-arm.h | 543 void Vmov(const DwVfpRegister dst,
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| D | macro-assembler-arm.cc | 1000 void MacroAssembler::Vmov(const DwVfpRegister dst, in Vmov() function in v8::internal::MacroAssembler
3702 Vmov(double_scratch, 255.0, result_reg); in ClampDoubleToUint8()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 3253 SDValue Vmov = DAG.getNode(ARMISD::VMOVIMM, dl, VmovVT, EncodedVal); in getZeroVector() local
3254 return DAG.getNode(ISD::BITCAST, dl, VT, Vmov); in getZeroVector()
3944 SDValue Vmov = DAG.getNode(ARMISD::VMOVIMM, dl, VmovVT, Val); in LowerBUILD_VECTOR() local
3945 return DAG.getNode(ISD::BITCAST, dl, VT, Vmov); in LowerBUILD_VECTOR()
3955 SDValue Vmov = DAG.getNode(ARMISD::VMVNIMM, dl, VmovVT, Val); in LowerBUILD_VECTOR() local
3956 return DAG.getNode(ISD::BITCAST, dl, VT, Vmov); in LowerBUILD_VECTOR()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 4511 SDValue Vmov = DAG.getNode(ARMISD::VMOVIMM, dl, VmovVT, EncodedVal); in getZeroVector() local
4512 return DAG.getNode(ISD::BITCAST, dl, VT, Vmov); in getZeroVector()
5665 SDValue Vmov = DAG.getNode(ARMISD::VMOVIMM, dl, VmovVT, Val); in LowerBUILD_VECTOR() local
5666 return DAG.getNode(ISD::BITCAST, dl, VT, Vmov); in LowerBUILD_VECTOR()
5676 SDValue Vmov = DAG.getNode(ARMISD::VMVNIMM, dl, VmovVT, Val); in LowerBUILD_VECTOR() local
5677 return DAG.getNode(ISD::BITCAST, dl, VT, Vmov); in LowerBUILD_VECTOR()
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