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Searched refs:X12 (Results 1 – 21 of 21) sorted by relevance

/external/clang/test/CodeGen/
Doverride-layout.c103 struct PACKED X12 { struct
149 struct X12 x12; in use_structs()
150 x12.x = sizeof(struct X12); in use_structs()
/external/boringssl/src/crypto/md4/
Dmd4.c139 uint32_t X0, X1, X2, X3, X4, X5, X6, X7, X8, X9, X10, X11, X12, X13, X14, X15; in md4_block_data_order() local
184 X12 = l; in md4_block_data_order()
188 R0(A, B, C, D, X12, 3, 0); in md4_block_data_order()
200 R1(B, C, D, A, X12, 13, 0x5A827999L); in md4_block_data_order()
217 R2(B, C, D, A, X12, 15, 0x6ED9EBA1L); in md4_block_data_order()
/external/clang/test/SemaCXX/
Dnew-delete.cpp222 struct X12 { struct
226 struct X13 : X12 {
227 using X12::operator new;
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/MCTargetDesc/
DPPCBaseInfo.h43 case R12: case X12: case F12: case V12: case CR3LT: return 12; in getPPCRegisterNumbering()
/external/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.h44 case AArch64::X12: return AArch64::W12; in getWRegFromXReg()
84 case AArch64::W12: return AArch64::X12; in getXRegFromWReg()
/external/llvm/lib/Target/PowerPC/
DPPCAsmPrinter.cpp1213 .addReg(PPC::X12) in EmitFunctionBodyStart()
1231 .addReg(PPC::X12)); in EmitFunctionBodyStart()
1235 .addReg(PPC::X12)); in EmitFunctionBodyStart()
DPPCFrameLowering.cpp581 unsigned R12 = Subtarget.isPPC64() ? PPC::X12 : PPC::R12; in findScratchRegister()
752 unsigned TempReg = isPPC64 ? PPC::X12 : PPC::R12; // another scratch reg in emitPrologue()
1133 unsigned TempReg = isPPC64 ? PPC::X12 : PPC::R12; // another scratch reg in emitEpilogue()
DPPCInstr64Bit.td979 Defs = [X0,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7] in
988 Defs = [X0,X3,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7]
1011 Defs = [X0,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7] in
1020 Defs = [X0,X3,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7]
DPPCISelLowering.cpp5599 RegsToPass.push_back(std::make_pair((unsigned)PPC::X12, Callee)); in LowerCall_64SVR4()
5987 RegsToPass.push_back(std::make_pair((unsigned)(isPPC64 ? PPC::X12 : in LowerCall_Darwin()
12037 PPC::X12, PPC::LR8, PPC::CTR8, 0 in getScratchRegisters()
/external/guava/guava-tests/benchmark/com/google/common/base/
DEnumsBenchmark.java79 X0, X1, X2, X3, X4, X5, X6, X7, X8, X9, X10, X11, X12, X13, X14, X15, X16, X17, X18, enumConstant
88 X0, X1, X2, X3, X4, X5, X6, X7, X8, X9, X10, X11, X12, X13, X14, X15, X16, X17, X18, X19, X20, enumConstant
/external/llvm/lib/Target/PowerPC/Disassembler/
DPPCDisassembler.cpp189 PPC::X12, PPC::X13, PPC::X14, PPC::X15,
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCRegisterInfo.td114 def X12 : GP8<R12, "r12">, DwarfRegNum<[12, -2]>;
DPPCInstr64Bit.td69 Defs = [X0,X2,X3,X4,X5,X6,X7,X8,X9,X10,X11,X12,
95 Defs = [X0,X2,X3,X4,X5,X6,X7,X8,X9,X10,X11,X12,
DPPCISelLowering.cpp3398 RegsToPass.push_back(std::make_pair((unsigned)(isPPC64 ? PPC::X12 : in LowerCall_Darwin()
/external/llvm/lib/Target/PowerPC/AsmParser/
DPPCAsmParser.cpp59 PPC::X12, PPC::X13, PPC::X14, PPC::X15,
70 PPC::X12, PPC::X13, PPC::X14, PPC::X15,
/external/llvm/lib/Target/AArch64/
DAArch64RegisterInfo.td102 def X12 : AArch64Reg<12, "x12", [W12]>, DwarfRegAlias<W12>;
/external/llvm/lib/Target/AArch64/Disassembler/
DAArch64Disassembler.cpp371 AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14,
/external/deqp/external/vulkancts/data/vulkan/glsl/es310/
Darrays.test16 #X12. Test array element access at initialization with const/dynamic values
/external/deqp/data/gles3/shaders/
Darrays.test16 #X12. Test array element access at initialization with const/dynamic values
/external/icu/icu4c/source/test/testdata/
Dconversion.txt738 "\u4e2e%X12%X92%XA0\ue5c4",
/external/valgrind/memcheck/
Dmc_machine.c965 if (o == GOF(X12) && is48) return o; in get_otrack_shadow_offset_wrk()