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Searched refs:XMM2 (Results 1 – 25 of 47) sorted by relevance

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/external/mesa3d/src/mesa/x86/
Dsse_normal.S77 MOVSS ( M(5), XMM2 ) /* m5 */
78 UNPCKLPS( XMM2, XMM1 ) /* m5 | m0 */
86 MOVLPS ( S(0), XMM2 ) /* uy | ux */
87 MULPS ( XMM1, XMM2 ) /* uy*m5*scale | ux*m0*scale */
88 MOVLPS ( XMM2, D(0) ) /* ->D(1) | D(0) */
90 MOVSS ( S(2), XMM2 ) /* uz */
91 MULSS ( XMM0, XMM2 ) /* uz*m10*scale */
92 MOVSS ( XMM2, D(2) ) /* ->D(2) */
147 MOVSS ( M(5), XMM2 ) /* m5 */
148 UNPCKLPS( XMM2, XMM1 ) /* m5 | m1 */
[all …]
Dsse_xform1.S82 MOVSS( S(0), XMM2 ) /* ox */
83 SHUFPS( CONST(0x0), XMM2, XMM2 ) /* ox | ox | ox | ox */
84 MULPS( XMM0, XMM2 ) /* ox*m3 | ox*m2 | ox*m1 | ox*m0 */
85 ADDPS( XMM1, XMM2 ) /* + | + | + | + */
86 MOVUPS( XMM2, D(0) )
188 MOVSS( M(13), XMM2 ) /* m13 */
198 MOVSS( XMM2, D(1) )
249 MOVSS( M(14), XMM2 ) /* m14 */
256 MOVSS( XMM2, D(2) ) /* m14->D(2) */
310 MOVSS( S(0), XMM2 ) /* ox */
[all …]
Dsse_xform3.S79 MOVAPS ( REGOFF(32, EDX), XMM2 ) /* m8 | m9 | m10 | m11 */
94 MULPS ( XMM2, XMM6 ) /* m11*oz | m10*oz | m9*oz | m8*oz */
205 MOVSS ( M(5), XMM2 ) /* - | - | - | m5 */
206 UNPCKLPS ( XMM2, XMM1 ) /* - | - | m5 | m0 */
207 MOVLPS ( M(12), XMM2 ) /* - | - | m13 | m12 */
216 ADDPS ( XMM2, XMM0 ) /* - | - | +m13 | +m12 */
270 MOVSS ( M(5), XMM2 ) /* - | - | - | m5 */
271 UNPCKLPS ( XMM2, XMM1 ) /* - | - | m5 | m0 */
272 MOVLPS ( M(8), XMM2 ) /* - | - | m9 | m8 */
283 MULPS ( XMM2, XMM5 ) /* oz*m9 | oz*m8 */
[all …]
Dsse_xform2.S78 MOVAPS( M(12), XMM2 ) /* m15 | m14 | m13 | m12 */
90 ADDPS( XMM2, XMM3 )
193 MOVSS ( M(5), XMM2 ) /* - | - | - | m5 */
194 UNPCKLPS ( XMM2, XMM1 ) /* - | - | m5 | m0 */
195 MOVLPS ( M(12), XMM2 ) /* - | - | m13 | m12 */
202 ADDPS ( XMM2, XMM0 ) /* - | - | +m13 | +m12 */
252 MOVSS ( M(5), XMM2 ) /* - | - | - | m5 */
253 UNPCKLPS ( XMM2, XMM1 ) /* - | - | m5 | m0 */
312 MOVLPS( M(12), XMM2 ) /* m13 | m12 */
325 ADDPS( XMM2, XMM3 )
[all …]
Dsse_xform4.S86 MOVSS( SRC(2), XMM2 ) /* oz */
87 SHUFPS( CONST(0x0), XMM2, XMM2 ) /* oz | oz | oz | oz */
88 MULPS( XMM6, XMM2 ) /* oz*m11 | oz*m10 | oz*m9 | oz*m8 */
95 ADDPS( XMM2, XMM0 ) /* ox*m3+oy*m7+oz*m11 | ... */
145 MOVAPS( MAT(8), XMM2 ) /* m11 | m10 | m9 | m8 */
160 MULPS( XMM2, XMM6 ) /* oz*m11 | oz*m10 | oz*m9 | oz*m8 */
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/X86/
Denhanced.txt7 # CHECK: [o:xorps][w: ][2-r:%xmm1=r129][p:,][w: ][0-r:%xmm2=r130] 0:[XMM2/130]=0 1:[XMM2/130]=0 2:[…
9 # CHECK: [o:andps][w: ][2-r:%xmm1=r129][p:,][w: ][0-r:%xmm2=r130] 0:[XMM2/130]=0 1:[XMM2/130]=0 2:[…
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86CallingConv.td37 // Vector types are returned in XMM0 and XMM1, when they fit. XMM2 and XMM3
41 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,
65 CCIfType<[f32, f64], CCAssignToReg<[XMM0,XMM1,XMM2]>>>>,
76 CCIfType<[f32], CCIfSubtarget<"hasXMMInt()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
77 CCIfType<[f64], CCIfSubtarget<"hasXMMInt()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
159 CCAssignToReg<[XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]>>>,
201 [XMM0, XMM1, XMM2, XMM3]>>,
207 [XMM1, XMM2, XMM3]>>>>,
210 [XMM0, XMM1, XMM2, XMM3]>>,
214 CCAssignToRegWithShadow<[XMM0, XMM1, XMM2, XMM3],
[all …]
DX86GenCallingConv.inc176 X86::XMM0, X86::XMM1, X86::XMM2
227 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
329 X86::XMM0, X86::XMM1, X86::XMM2
548 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7
653 X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6
708 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
723 X86::XMM1, X86::XMM2, X86::XMM3
738 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
755 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
854 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
[all …]
DX86InstrControl.td143 XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
182 XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
218 XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
250 XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, EFLAGS],
283 XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, EFLAGS],
DX86GenRegisterInfo.inc149 XMM2 = 130,
378 const unsigned XMM2_Overlaps[] = { X86::XMM2, X86::YMM2, 0 };
394 const unsigned YMM2_Overlaps[] = { X86::YMM2, X86::XMM2, 0 };
477 const unsigned YMM2_SubRegsSet[] = { X86::XMM2, 0 };
695 { "XMM2", XMM2_Overlaps, XMM2_SubRegsSet, XMM2_SuperRegsSet },
770 …X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8,…
790 …X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8,…
810 …X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8,…
1216 RI->mapDwarfRegToLLVMReg(19, X86::XMM2, false );
1259 RI->mapDwarfRegToLLVMReg(23, X86::XMM2, false );
[all …]
DX86RegisterInfo.td170 def XMM2: Register<"xmm2">, DwarfRegNum<[19, 23, 23]>;
193 def YMM2: RegisterWithSubRegs<"ymm2", [XMM2]>, DwarfRegAlias<XMM2>;
/external/llvm/lib/Target/X86/
DX86CallingConv.td53 // Vector types are returned in XMM0 and XMM1, when they fit. XMM2 and XMM3
57 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,
87 CCIfType<[f32, f64], CCAssignToReg<[XMM0,XMM1,XMM2]>>>>,
98 CCIfType<[f32], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
99 CCIfType<[f64], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
114 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,
142 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,
206 // XMM0, XMM1, XMM2 and XMM3 can be used to return FP values.
207 CCIfType<[f32], CCAssignToReg<[XMM0, XMM1, XMM2, XMM3]>>,
208 CCIfType<[f64], CCAssignToReg<[XMM0, XMM1, XMM2, XMM3]>>,
[all …]
/external/llvm/test/CodeGen/X86/
Dstackmap-liveness.ll47 ; LiveOut Entry 1: %YMM2 (16 bytes) --> %XMM2
94 ; LiveOut Entry 5: %YMM2 (16 bytes) --> %XMM2
126 ; LiveOut Entry 2: %YMM2 (16 bytes) --> %XMM2
163 ; LiveOut Entry 2: %YMM2 (16 bytes) --> %XMM2
Dbreak-false-dep.ll78 ; SSE: xorps [[XMM2:%xmm[0-9]+]]
79 ; SSE: , [[XMM2]]
80 ; SSE: cvtsi2ssl %{{.*}}, [[XMM2]]
Dghc-cc64.ll17 @f2 = external global float ; assigned to register: XMM2
/external/swiftshader/third_party/LLVM/test/TableGen/
DSlice.td43 def XMM2: Register<"xmm2">;
59 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
Dcast.td43 def XMM2: Register<"xmm2">;
59 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
DTargetInstrSpec.td44 def XMM2: Register<"xmm2">;
60 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
DMultiPat.td52 def XMM2: Register<"xmm2">;
68 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
/external/llvm/test/TableGen/
DSlice.td42 def XMM2: Register<"xmm2">;
58 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
DTargetInstrSpec.td49 def XMM2: Register<"xmm2">;
65 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
Dcast.td48 def XMM2: Register<"xmm2">;
64 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
DMultiPat.td52 def XMM2: Register<"xmm2">;
68 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
/external/llvm/test/MC/X86/
Dintel-syntax-encoding.s65 cmpltps XMM2, XMM1
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dghc-cc64.ll17 @f2 = external global float ; assigned to register: XMM2

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