/external/mesa3d/src/mesa/drivers/dri/i915/ |
D | intel_span.c | 117 if (!ctx->Texture.Unit[i]._ReallyEnabled) in intel_span_map_buffers() 158 if (ctx->Texture.Unit[i]._ReallyEnabled) { in intelSpanRenderFinish() 188 if (ctx->Texture.Unit[i]._ReallyEnabled && in intel_map_vertex_shader_textures() 208 if (ctx->Texture.Unit[i]._ReallyEnabled && in intel_unmap_vertex_shader_textures()
|
D | i830_texblend.c | 449 if (ctx->Texture.Unit[unit]._ReallyEnabled) in i830EmitTextureBlend() 453 if (ctx->Texture.Unit[unit]._ReallyEnabled) in i830EmitTextureBlend()
|
D | i830_texstate.c | 334 switch (intel->ctx.Texture.Unit[i]._ReallyEnabled) { in i830UpdateTextureState()
|
D | i915_texstate.c | 410 switch (intel->ctx.Texture.Unit[i]._ReallyEnabled) { in i915UpdateTextureState()
|
/external/mesa3d/src/mesa/drivers/dri/i965/ |
D | intel_span.c | 117 if (!ctx->Texture.Unit[i]._ReallyEnabled) in intel_span_map_buffers() 158 if (ctx->Texture.Unit[i]._ReallyEnabled) { in intelSpanRenderFinish() 188 if (ctx->Texture.Unit[i]._ReallyEnabled && in intel_map_vertex_shader_textures() 208 if (ctx->Texture.Unit[i]._ReallyEnabled && in intel_unmap_vertex_shader_textures()
|
D | brw_tex.c | 55 if (texUnit->_ReallyEnabled) { in brw_validate_textures()
|
D | gen7_sampler_state.c | 212 if (ctx->Texture.Unit[unit]._ReallyEnabled) in gen7_upload_samplers()
|
/external/mesa3d/src/mesa/drivers/dri/intel/ |
D | intel_span.c | 117 if (!ctx->Texture.Unit[i]._ReallyEnabled) in intel_span_map_buffers() 158 if (ctx->Texture.Unit[i]._ReallyEnabled) { in intelSpanRenderFinish() 188 if (ctx->Texture.Unit[i]._ReallyEnabled && in intel_map_vertex_shader_textures() 208 if (ctx->Texture.Unit[i]._ReallyEnabled && in intel_unmap_vertex_shader_textures()
|
/external/mesa3d/src/mesa/drivers/dri/radeon/ |
D | radeon_state_init.c | 209 CHECK( cube0_mm, (ctx->Texture.Unit[0]._ReallyEnabled & TEXTURE_CUBE_BIT), 2 + 4*5 - CUBE_STATE_SIZ… 210 CHECK( cube1_mm, (ctx->Texture.Unit[1]._ReallyEnabled & TEXTURE_CUBE_BIT), 2 + 4*5 - CUBE_STATE_SIZ… 211 CHECK( cube2_mm, (ctx->Texture.Unit[2]._ReallyEnabled & TEXTURE_CUBE_BIT), 2 + 4*5 - CUBE_STATE_SIZ… 214 TCL_CHECK( tcl_tex0_add4, ctx->Texture.Unit[0]._ReallyEnabled, 4 ) 215 TCL_CHECK( tcl_tex1_add4, ctx->Texture.Unit[1]._ReallyEnabled, 4 ) 216 TCL_CHECK( tcl_tex2_add4, ctx->Texture.Unit[2]._ReallyEnabled, 4 ) 236 CHECK( txr0, (ctx->Texture.Unit[0]._ReallyEnabled & TEXTURE_RECT_BIT), 0 ) 237 CHECK( txr1, (ctx->Texture.Unit[1]._ReallyEnabled & TEXTURE_RECT_BIT), 0 ) 238 CHECK( txr2, (ctx->Texture.Unit[2]._ReallyEnabled & TEXTURE_RECT_BIT), 0 ) 425 if (!(ctx->Texture.Unit[i]._ReallyEnabled & TEXTURE_CUBE_BIT)) in cube_emit_cs() [all …]
|
D | radeon_span.c | 127 if (ctx->Texture.Unit[i]._ReallyEnabled) { in radeonSpanRenderStart() 146 if (ctx->Texture.Unit[i]._ReallyEnabled) in radeonSpanRenderFinish()
|
D | radeon_texstate.c | 279 assert( (texUnit->_ReallyEnabled == 0) in radeonUpdateTextureEnv() 298 if ( !texUnit->_ReallyEnabled ) { in radeonUpdateTextureEnv() 1103 if (ctx->Texture.Unit[unit]._ReallyEnabled & TEXTURE_3D_BIT) { in radeonUpdateTextureUnit() 1109 if (!ctx->Texture.Unit[unit]._ReallyEnabled) { in radeonUpdateTextureUnit()
|
D | radeon_maos_arrays.c | 272 ((ctx->Texture.Unit[unit]._ReallyEnabled & (TEXTURE_CUBE_BIT)) == 0)) { in radeonEmitArrays()
|
D | radeon_maos_verts.c | 357 ((ctx->Texture.Unit[unit]._ReallyEnabled & (TEXTURE_CUBE_BIT)) == 0)) { in radeonEmitArrays()
|
/external/mesa3d/docs/ |
D | RELNOTES-4.1 | 166 1. ctx->Texture._ReallyEnabled is obsolete. 172 ctx->Texture.Unit[k]._ReallyEnabled is non-zero. You'll have to look at 173 ctx->Texture.Unit[k]._ReallyEnabled to learn if the 1D, 2D, 3D, cube or 190 ctx->Texture.Unit[i]._ReallyEnabled fields. Exactly 0 or 1 bits will 191 be set in _ReallyEnabled at any time! 193 Q: "What's the purpose of Unit[i].Enabled vs Unit[i]._ReallyEnabled?" 201 The _ReallyEnabled field will have a bit set ONLY if the texture
|
/external/mesa3d/src/mesa/drivers/dri/r200/ |
D | radeon_span.c | 127 if (ctx->Texture.Unit[i]._ReallyEnabled) { in radeonSpanRenderStart() 146 if (ctx->Texture.Unit[i]._ReallyEnabled) in radeonSpanRenderFinish()
|
D | r200_texstate.c | 318 assert( (texUnit->_ReallyEnabled == 0) in r200UpdateTextureEnv() 339 if ( !texUnit->_ReallyEnabled ) { in r200UpdateTextureEnv() 861 if (ctx->Texture.Unit[j]._ReallyEnabled) { in r200UpdateAllTexEnv() 890 if (!texUnit->_ReallyEnabled) { in r200UpdateAllTexEnv() 962 if (ctx->Texture.Unit[i]._ReallyEnabled && !texregfree[i]) in r200UpdateAllTexEnv() 963 rmesa->state.texture.unit[i].unitneeded = ctx->Texture.Unit[i]._ReallyEnabled; in r200UpdateAllTexEnv() 974 if (ctx->Texture.Unit[i]._ReallyEnabled && stageref[i+1]) { in r200UpdateAllTexEnv() 1581 rmesa->state.texture.unit[i].unitneeded = ctx->Texture.Unit[i]._ReallyEnabled; in r200UpdateTextureState()
|
D | r200_fragshader.c | 365 GLbitfield targetbit = ctx->Texture.Unit[reg]._ReallyEnabled; in r200UpdateFSRouting() 414 GLbitfield targetbit = ctx->Texture.Unit[reg]._ReallyEnabled; in r200UpdateFSRouting() 452 GLbitfield targetbit = ctx->Texture.Unit[reg]._ReallyEnabled; in r200UpdateFSRouting()
|
/external/mesa3d/src/mesa/main/ |
D | texstate.c | 377 if (ctx->Texture.Unit[u]._ReallyEnabled && in update_texture_matrices() 560 texUnit->_ReallyEnabled = 0x0; in update_texture_state() 583 texUnit->_ReallyEnabled = 1 << texIndex; in update_texture_state() 590 if (!texUnit->_ReallyEnabled) { in update_texture_state() 611 texUnit->_ReallyEnabled = 1 << texTarget; in update_texture_state()
|
/external/mesa3d/src/mesa/drivers/dri/nouveau/ |
D | nv20_state_tex.c | 172 if (!ctx->Texture.Unit[i]._ReallyEnabled) { in nv20_emit_tex_obj() 266 if (!ctx->Texture.Unit[i]._ReallyEnabled) in nv20_emit_tex_shader()
|
D | nv04_context.c | 56 if ((ctx->Texture.Unit[0]._ReallyEnabled && in nv04_context_engine() 58 ctx->Texture.Unit[1]._ReallyEnabled || in nv04_context_engine()
|
D | nv04_state_tex.c | 68 if (ctx->Texture.Unit[i]._ReallyEnabled) { in nv04_emit_tex_obj()
|
D | nv10_state_tex.c | 168 if (!ctx->Texture.Unit[i]._ReallyEnabled) { in nv10_emit_tex_obj()
|
D | nv04_state_frag.c | 260 if (ctx->Texture.Unit[i]._ReallyEnabled) { in nv04_emit_tex_env()
|
/external/mesa3d/src/mesa/state_tracker/ |
D | st_cb_drawtex.c | 130 if (ctx->Texture.Unit[i]._ReallyEnabled & TEXTURE_2D_BIT) { in st_DrawTex() 199 if (ctx->Texture.Unit[i]._ReallyEnabled & TEXTURE_2D_BIT) { in st_DrawTex()
|
/external/mesa3d/src/mesa/swrast/ |
D | s_texcombine.c | 192 if (!ctx->Texture.Unit[srcUnit]._ReallyEnabled) in texture_combine() 282 if (!ctx->Texture.Unit[srcUnit]._ReallyEnabled) in texture_combine() 648 if (texUnit->_ReallyEnabled && in _swrast_texture_span() 714 if (texUnit->_ReallyEnabled && in _swrast_texture_span() 778 if (ctx->Texture.Unit[unit]._ReallyEnabled) in _swrast_texture_span()
|