| /external/llvm/lib/Target/Mips/ |
| D | Mips16ISelLowering.h | 25 bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AddrSpace,
|
| D | MipsSEISelLowering.h | 34 bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AS = 0,
|
| D | Mips16ISelLowering.cpp | 160 Mips16TargetLowering::allowsMisalignedMemoryAccesses(EVT VT, in allowsMisalignedMemoryAccesses() function in Mips16TargetLowering
|
| /external/llvm/include/llvm/Analysis/ |
| D | TargetTransformInfo.h | 392 bool allowsMisalignedMemoryAccesses(unsigned BitWidth, unsigned AddressSpace = 0,
671 virtual bool allowsMisalignedMemoryAccesses(unsigned BitWidth,
844 bool allowsMisalignedMemoryAccesses(unsigned BitWidth, unsigned AddressSpace, in allowsMisalignedMemoryAccesses() function
846 return Impl.allowsMisalignedMemoryAccesses(BitWidth, AddressSpace, in allowsMisalignedMemoryAccesses()
|
| D | TargetTransformInfoImpl.h | 247 bool allowsMisalignedMemoryAccesses(unsigned BitWidth, in allowsMisalignedMemoryAccesses() function
|
| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.h | 59 bool allowsMisalignedMemoryAccesses(EVT, unsigned AddrSpace, unsigned Align,
|
| D | WebAssemblyISelLowering.cpp | 234 bool WebAssemblyTargetLowering::allowsMisalignedMemoryAccesses( in allowsMisalignedMemoryAccesses() function in WebAssemblyTargetLowering
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | R600ISelLowering.h | 47 bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AS,
|
| D | SIISelLowering.h | 89 bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AS,
|
| D | AMDGPUISelLowering.cpp | 2215 if (!allowsMisalignedMemoryAccesses(VT, AS, Align, &IsFast)) { in performLoadCombine()
2264 if (!allowsMisalignedMemoryAccesses(VT, AS, Align, &IsFast)) in performStoreCombine()
|
| D | R600ISelLowering.cpp | 1817 bool R600TargetLowering::allowsMisalignedMemoryAccesses(EVT VT, in allowsMisalignedMemoryAccesses() function in R600TargetLowering
|
| /external/llvm/lib/Analysis/ |
| D | TargetTransformInfo.cpp | 189 bool TargetTransformInfo::allowsMisalignedMemoryAccesses(unsigned BitWidth, in allowsMisalignedMemoryAccesses() function in TargetTransformInfo
193 return TTIImpl->allowsMisalignedMemoryAccesses(BitWidth, AddressSpace, in allowsMisalignedMemoryAccesses()
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.h | 246 bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AddrSpace,
|
| /external/llvm/include/llvm/CodeGen/ |
| D | BasicTTIImpl.h | 108 bool allowsMisalignedMemoryAccesses(unsigned BitWidth, unsigned AddressSpace, in allowsMisalignedMemoryAccesses() function
111 return getTLI()->allowsMisalignedMemoryAccesses(M, AddressSpace, Alignment, Fast); in allowsMisalignedMemoryAccesses()
|
| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.h | 397 bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AS,
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.h | 243 bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AddrSpace = 0,
|
| D | AArch64FastISel.cpp | 1700 if (!TLI.allowsMisalignedMemoryAccesses(VT)) in emitLoad()
2002 if (!TLI.allowsMisalignedMemoryAccesses(VT)) in emitStore()
|
| D | AArch64ISelLowering.cpp | 802 bool AArch64TargetLowering::allowsMisalignedMemoryAccesses(EVT VT, in allowsMisalignedMemoryAccesses() function in AArch64TargetLowering
7257 (allowsMisalignedMemoryAccesses(MVT::f128, 0, 1, &Fast) && Fast))) in getOptimalMemOpType()
7262 (allowsMisalignedMemoryAccesses(MVT::i64, 0, 1, &Fast) && Fast))) in getOptimalMemOpType()
7267 (allowsMisalignedMemoryAccesses(MVT::i32, 0, 1, &Fast) && Fast))) in getOptimalMemOpType()
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 272 bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AddrSpace,
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.h | 695 bool allowsMisalignedMemoryAccesses(EVT VT,
|
| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 713 bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AS, unsigned Align,
|
| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 425 if (allowsMisalignedMemoryAccesses(LD->getMemoryVT(), in LowerLOAD()
508 if (allowsMisalignedMemoryAccesses(ST->getMemoryVT(), in LowerSTORE()
1801 allowsMisalignedMemoryAccesses(ST->getMemoryVT(), in PerformDAGCombine()
|
| /external/llvm/lib/Transforms/Vectorize/ |
| D | LoadStoreVectorizer.cpp | 994 bool Allows = TTI.allowsMisalignedMemoryAccesses(SzInBytes * 8, AddressSpace, in accessIsMisaligned()
|
| /external/llvm/include/llvm/Target/ |
| D | TargetLowering.h | 954 virtual bool allowsMisalignedMemoryAccesses(EVT,
|
| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 1642 return allowsMisalignedMemoryAccesses(VT, AddrSpace, Alignment, Fast); in allowsMemoryAccess()
|