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/external/llvm/test/Object/
Dnm-universal-binary.test20 CHECK-OBJ: macho-universal.x86_64.i386 (for architecture x86_64):
22 CHECK-OBJ: macho-universal.x86_64.i386 (for architecture i386):
25 CHECK-64-OBJ: macho-universal64.x86_64.i386 (for architecture x86_64):
27 CHECK-64-OBJ: macho-universal64.x86_64.i386 (for architecture i386):
34 CHECK-OBJ-armv7m-NOT: Unknown architecture named
35 CHECK-OBJ-armv7m: does not contain architecture
37 CHECK-OBJ-foobar: Unknown architecture named
38 CHECK-OBJ-foobar: does not contain architecture
40 CHECK-AR: macho-universal-archive.x86_64.i386(hello.o) (for architecture x86_64):
46 CHECK-AR: macho-universal-archive.x86_64.i386(foo.o) (for architecture i386):
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Dobjdump-file-header.test8 COFF-i386: architecture: i386
14 ELF-i386: architecture: i386
Dsize-trivial-macho.test78 u: 4096 0 0 4294971392 4294975488 100002000 {{.*}}/macho-universal.x86_64.i386 (for architecture x8…
79 u: 4096 0 0 8192 12288 3000 {{.*}}/macho-universal.x86_64.i386 (for architecture i386)
85 uAR: 136 0 0 32 168 a8 {{.*}}/macho-universal-archive.x86_64.i386(hello.o) (for architecture x86_64)
86 uAR: 5 4 0 0 9 9 {{.*}}/macho-universal-archive.x86_64.i386(foo.o) (for architecture i386)
/external/v8/src/base/
Dbuild_config.h95 #error Target architecture was not detected as supported by v8
133 #error Unknown target architecture pointer size
138 #error Target architecture ia32 is only supported on ia32 host
142 #error Target architecture x64 is only supported on x64 host
146 #error Target architecture x32 is only supported on x64 host with x32 support
149 #error Target architecture arm is only supported on arm and ia32 host
152 #error Target architecture arm64 is only supported on arm64 and x64 host
155 #error Target architecture mips is only supported on mips and ia32 host
158 #error Target architecture mips64 is only supported on mips64 and x64 host
195 #error Unknown target architecture endianness
Dcpu.cc468 char* architecture = cpu_info.ExtractField("CPU architecture"); in CPU() local
469 if (architecture != NULL) { in CPU()
471 architecture_ = strtol(architecture, &end, 10); in CPU()
472 if (end == architecture) { in CPU()
474 if (strcmp(architecture, "AArch64") == 0) { in CPU()
480 delete[] architecture; in CPU()
/external/clang/test/SemaObjC/
Dsizeof-interface.m26 …or {{application of 'sizeof' to interface 'I0' is not supported on this architecture and platform}}
35 …or {{application of 'sizeof' to interface 'I0' is not supported on this architecture and platform}}
46 …); } I1_defs; // expected-error {{use of @defs is not supported on this architecture and platform}}
54 …tic on pointer to interface 'I0', which is not a constant size for this architecture and platform}}
55 …tic on pointer to interface 'I0', which is not a constant size for this architecture and platform}}
56 …tic on pointer to interface 'I0', which is not a constant size for this architecture and platform}}
67 …ror {{application of 'sizeof' to interface 'I' is not supported on this architecture and platform}}
88 …ic on pointer to interface 'Foo', which is not a constant size for this architecture and platform}}
89 …ic on pointer to interface 'Foo', which is not a constant size for this architecture and platform}}
/external/strace/
Dconfigure.ac62 AC_MSG_CHECKING([for supported architecture])
68 AC_DEFINE([BFIN], 1, [Define for the Blackfin architecture.])
72 AC_DEFINE([I386], 1, [Define for the i386 architecture.])
76 AC_DEFINE([IA64], 1, [Define for the IA64 architecture.])
80 AC_DEFINE([M68K], 1, [Define for the m68k architecture.])
85 AC_DEFINE([SPARC64], 1, [Define for the SPARC64 architecture.])
89 AC_DEFINE([SPARC], 1, [Define for the SPARC architecture.])
93 AC_DEFINE([METAG], 1, [Define for the Meta architecture.])
97 AC_DEFINE([MIPS], 1, [Define for the MIPS architecture.])
101 AC_DEFINE([ALPHA], 1, [Define for the Alpha architecture.])
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Dconfig.h.in3 /* Define for the AArch64 architecture. */
9 /* Define for the Alpha architecture. */
12 /* Define for the ARC architecture. */
15 /* Define for the ARM architecture. */
24 /* Define for the AVR32 architecture. */
27 /* Define for the Blackfin architecture. */
30 /* Define for the CRISv10 architecture. */
33 /* Define for the CRISv32 architecture. */
1122 /* Define for the HPPA architecture. */
1125 /* Define for the i386 architecture. */
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/external/llvm/test/tools/llvm-objdump/X86/
Dmacho-archive-headers.test9 CHECK: Archive : {{.*}}/macho-universal-archive.x86_64.i386 (architecture x86_64)
12 CHECK: Archive : {{.*}}/macho-universal-archive.x86_64.i386 (architecture i386)
16 OFFSETS: Archive : {{.*}}/macho-universal-archive.x86_64.i386 (architecture x86_64)
19 OFFSETS: Archive : {{.*}}/macho-universal-archive.x86_64.i386 (architecture i386)
23 NON-VERBOSE: Archive : {{.*}}/macho-universal-archive.x86_64.i386 (architecture x86_64)
26 NON-VERBOSE: Archive : {{.*}}/macho-universal-archive.x86_64.i386 (architecture i386)
Dmacho-universal-x86_64.i386.test12 UEXE-all: macho-universal.x86_64.i386 (architecture x86_64):
17 UEXE-all: macho-universal.x86_64.i386 (architecture i386):
35 FAT: architecture x86_64
42 FAT: architecture i386
53 NON-VERBOSE: architecture 0
60 NON-VERBOSE: architecture 1
/external/llvm/test/MC/ARM/
Ddirective-arch_extension-sec.s15 @ CHECK-V6: error: architectural extension 'sec' is not allowed for the current base architecture
18 …CHECK-V7-NOT: error: architectural extension 'sec' is not allowed for the current base architecture
26 @ CHECK-V6: error: architectural extension 'sec' is not allowed for the current base architecture
29 …CHECK-V7-NOT: error: architectural extension 'sec' is not allowed for the current base architecture
Ddirective-arch_extension-idiv.s17 @ CHECK-V6: error: architectural extension 'idiv' is not allowed for the current base architecture
20 @ CHECK-V7M: error: architectural extension 'idiv' is not allowed for the current base architecture
34 @ CHECK-V6: error: architectural extension 'idiv' is not allowed for the current base architecture
37 @ CHECK-V7M: error: architectural extension 'idiv' is not allowed for the current base architecture
/external/webrtc/webrtc/base/
Dsysteminfo_unittest.cc41 rtc::SystemInfo::Architecture architecture = info.GetCpuArchitecture(); in TEST() local
44 EXPECT_EQ(rtc::SystemInfo::SI_ARCH_X64, architecture); in TEST()
47 EXPECT_EQ(rtc::SystemInfo::SI_ARCH_ARM, architecture); in TEST()
49 EXPECT_EQ(rtc::SystemInfo::SI_ARCH_X86, architecture); in TEST()
/external/kmod/testsuite/module-playground/
DREADME13 For each architecture. See the Makefile to check which are the supported architectures.
17 KDIR_<arch>: for each architecture it needs to point to a
20 CROSS_COMPILER_<arch: for each architecture it needs to point to the
/external/strace/debian/
Drules22 DEB_BUILD_GNU_TYPE := $(shell dpkg-architecture -qDEB_BUILD_GNU_TYPE)
23 DEB_HOST_GNU_TYPE := $(shell dpkg-architecture -qDEB_HOST_GNU_TYPE)
24 DEB_HOST_ARCH := $(shell dpkg-architecture -qDEB_HOST_ARCH)
/external/llvm/docs/CommandGuide/
Dlli.rst17 and it can only interpret (or JIT-compile) for the host architecture.
38 for this architecture. Defaults to false.
70 architecture which is not compatible with the current system.
74 Specify the architecture for which to generate assembly, overriding the target
77 autodetected to the current architecture.
81 Specify a specific chip in the current architecture to generate code for.
83 the current architecture. For a list of available CPUs, use:
Dllc.rst13 for a specified architecture. The assembly language output can then be passed
16 The choice of architecture for the output assembly code is automatically
57 Specify the architecture for which to generate assembly, overriding the target
60 autodetected to the current architecture.
64 Specify a specific chip in the current architecture to generate code for.
66 the current architecture. For a list of available CPUs, use:
/external/webrtc/webrtc/test/testsupport/
Dfileutils.cc227 std::string architecture = "64"; in ResourcePath()
229 std::string architecture = "32"; in ResourcePath()
235 architecture + "." + extension; in ResourcePath()
245 resource_file = resources_path + name + "_" + architecture + "." + extension; in ResourcePath()
/external/swiftshader/third_party/LLVM/docs/HistoricalNotes/
D2000-11-18-EarlyDesignIdeas.txt11 architecture interface first (i.e., consider the code generation and
12 processor issues), since the architecture interface question is also
20 Also, while the architecture interface question is important for
58 -- Multiscalar architecture from Wisconsin
59 -- Simultaneous multithreading architecture from Washington
/external/llvm/docs/HistoricalNotes/
D2000-11-18-EarlyDesignIdeas.txt11 architecture interface first (i.e., consider the code generation and
12 processor issues), since the architecture interface question is also
20 Also, while the architecture interface question is important for
58 -- Multiscalar architecture from Wisconsin
59 -- Simultaneous multithreading architecture from Washington
/external/swiftshader/third_party/LLVM/docs/CommandGuide/
Dlli.pod15 available for the current architecture, or an interpreter. B<lli> takes all of
36 for this architecture. Defaults to false.
71 architecture which is not compatible with the current system.
75 Specify the architecture for which to generate assembly, overriding the target
78 autodetected to the current architecture.
82 Specify a specific chip in the current architecture to generate code for.
84 the current architecture. For a list of available CPUs, use:
Dllc.pod14 specified architecture. The assembly language output can then be passed through
17 The choice of architecture for the output assembly code is automatically
58 Specify the architecture for which to generate assembly, overriding the target
61 autodetected to the current architecture.
65 Specify a specific chip in the current architecture to generate code for.
67 the current architecture. For a list of available CPUs, use:
/external/libunwind/doc/
DNOTES10 - handler: a pointer to an architecture & language-specific
12 - lsda: a pointer to an architecture & language-specific
15 The API defines no well-known preserved registers. Each architecture
18 preserved registers are defined in the architecture-specific header
69 architecture, as it doesn't rely on any arch-specific registers.
75 the target architecture name (e.g., ia32, ia64, or alpha). Similarly,
/external/conscrypt/openjdk/
Dbuild.gradle10 // Allow the java executable to be specified via env/property for each architecture.
136 // Execute the java executable to see if it supports the architecture flag.
165 architecture arch32Name
168 architecture arch64Name
203 throw new GradleException("Unknown architecture: " +
281 // Build the native artifact classifier from the OS and architecture.
282 def archName = binary.targetPlatform.architecture.name.replaceAll('-', '_')
/external/eigen/cmake/
DEigenTesting.cmake388 message(STATUS "SSE2: Using architecture defaults")
394 message(STATUS "SSE3: Using architecture defaults")
400 message(STATUS "SSSE3: Using architecture defaults")
406 message(STATUS "SSE4.1: Using architecture defaults")
412 message(STATUS "SSE4.2: Using architecture defaults")
418 message(STATUS "AVX: Using architecture defaults")
424 message(STATUS "FMA: Using architecture defaults")
430 message(STATUS "AVX512: Using architecture defaults")
436 message(STATUS "Altivec: Using architecture defaults")
442 message(STATUS "VSX: Using architecture defaults")
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