Home
last modified time | relevance | path

Searched refs:b32 (Results 1 – 25 of 75) sorted by relevance

123

/external/libopus/silk/
Dmacros.h51 #define silk_SMULWB(a32, b32) ((opus_int32)(((a32) * (opus_int64)((opus_int16)(b32))) >>… argument
53 …lk_SMULWB(a32, b32) ((((a32) >> 16) * (opus_int32)((opus_int16)(b32))) + ((((a32) & 0x0… argument
58 #define silk_SMLAWB(a32, b32, c32) ((opus_int32)((a32) + (((b32) * (opus_int64)((opus_int16)(… argument
60 #define silk_SMLAWB(a32, b32, c32) ((a32) + ((((b32) >> 16) * (opus_int32)((opus_int16)(c32))… argument
65 #define silk_SMULWT(a32, b32) ((opus_int32)(((a32) * (opus_int64)((b32) >> 16)) >> 16)) argument
67 #define silk_SMULWT(a32, b32) (((a32) >> 16) * ((b32) >> 16) + ((((a32) & 0x0000FFFF) * … argument
72 #define silk_SMLAWT(a32, b32, c32) ((opus_int32)((a32) + (((b32) * ((opus_int64)(c32) >> 16))… argument
74 #define silk_SMLAWT(a32, b32, c32) ((a32) + (((b32) >> 16) * ((c32) >> 16)) + ((((b32) & 0x00… argument
78 #define silk_SMULBB(a32, b32) ((opus_int32)((opus_int16)(a32)) * (opus_int32)((opus_int1… argument
81 #define silk_SMLABB(a32, b32, c32) ((a32) + ((opus_int32)((opus_int16)(b32))) * (opus_int32)(… argument
[all …]
DMacroDebug.h150 static OPUS_INLINE opus_int32 silk_ADD_SAT32_(opus_int32 a32, opus_int32 b32, char *file, int line){ in silk_ADD_SAT32_() argument
152 res = ((((opus_uint32)(a32) + (opus_uint32)(b32)) & 0x80000000) == 0 ? \ in silk_ADD_SAT32_()
153 ((((a32) & (b32)) & 0x80000000) != 0 ? silk_int32_MIN : (a32)+(b32)) : \ in silk_ADD_SAT32_()
154 ((((a32) | (b32)) & 0x80000000) == 0 ? silk_int32_MAX : (a32)+(b32)) ); in silk_ADD_SAT32_()
155 if ( res != silk_SAT32( (opus_int64)a32 + (opus_int64)b32 ) ) in silk_ADD_SAT32_()
157 fprintf (stderr, "silk_ADD_SAT32(%d, %d) in %s: line %d\n", a32, b32, file, line); in silk_ADD_SAT32_()
211 static OPUS_INLINE opus_int32 silk_SUB_SAT32_( opus_int32 a32, opus_int32 b32, char *file, int line… in silk_SUB_SAT32_() argument
213 res = ((((opus_uint32)(a32)-(opus_uint32)(b32)) & 0x80000000) == 0 ? \ in silk_SUB_SAT32_()
214 (( (a32) & ((b32)^0x80000000) & 0x80000000) ? silk_int32_MIN : (a32)-(b32)) : \ in silk_SUB_SAT32_()
215 ((((a32)^0x80000000) & (b32) & 0x80000000) ? silk_int32_MAX : (a32)-(b32)) ); in silk_SUB_SAT32_()
[all …]
DMacroCount.h54 static OPUS_INLINE opus_int32 silk_MUL(opus_int32 a32, opus_int32 b32){ in silk_MUL() argument
57 ret = a32 * b32; in silk_MUL()
62 static OPUS_INLINE opus_uint32 silk_MUL_uint(opus_uint32 a32, opus_uint32 b32){ in silk_MUL_uint() argument
65 ret = a32 * b32; in silk_MUL_uint()
69 static OPUS_INLINE opus_int32 silk_MLA(opus_int32 a32, opus_int32 b32, opus_int32 c32){ in silk_MLA() argument
72 ret = a32 + b32 * c32; in silk_MLA()
77 static OPUS_INLINE opus_int32 silk_MLA_uint(opus_uint32 a32, opus_uint32 b32, opus_uint32 c32){ in silk_MLA_uint() argument
80 ret = a32 + b32 * c32; in silk_MLA_uint()
85 static OPUS_INLINE opus_int32 silk_SMULWB(opus_int32 a32, opus_int32 b32){ in silk_SMULWB() argument
88 …ret = (a32 >> 16) * (opus_int32)((opus_int16)b32) + (((a32 & 0x0000FFFF) * (opus_int32)((opus_int1… in silk_SMULWB()
[all …]
DInlines.h99 const opus_int32 b32, /* I denominator (Q0) */ in silk_DIV32_varQ() argument
106 silk_assert( b32 != 0 ); in silk_DIV32_varQ()
112 b_headrm = silk_CLZ32( silk_abs(b32) ) - 1; in silk_DIV32_varQ()
113 …b32_nrm = silk_LSHIFT(b32, b_headrm); /* Q: b_headrm … in silk_DIV32_varQ()
144 const opus_int32 b32, /* I denominator (Q0) */ in silk_INVERSE32_varQ() argument
151 silk_assert( b32 != 0 ); in silk_INVERSE32_varQ()
155 b_headrm = silk_CLZ32( silk_abs(b32) ) - 1; in silk_INVERSE32_varQ()
156 …b32_nrm = silk_LSHIFT(b32, b_headrm); /* Q: b_headrm … in silk_INVERSE32_varQ()
DSigProc_FIX.h402 #define silk_MUL(a32, b32) ((a32) * (b32)) argument
405 #define silk_MUL_uint(a32, b32) silk_MUL(a32, b32) argument
408 #define silk_MLA(a32, b32, c32) silk_ADD32((a32),((b32) * (c32))) argument
411 #define silk_MLA_uint(a32, b32, c32) silk_MLA(a32, b32, c32) argument
414 #define silk_SMULTT(a32, b32) (((a32) >> 16) * ((b32) >> 16)) argument
417 #define silk_SMLATT(a32, b32, c32) silk_ADD32((a32),((b32) >> 16) * ((c32) >> 16)) argument
422 #define silk_SMULL(a32, b32) ((opus_int64)(a32) * /*(opus_int64)*/(b32)) argument
432 #define silk_MLA_ovflw(a32, b32, c32) silk_ADD32_ovflw((a32), (opus_uint32)(b32) * (opus_uint… argument
433 #define silk_SMLABB_ovflw(a32, b32, c32) (silk_ADD32_ovflw((a32) , ((opus_int32)((opus_int16)(b3… argument
436 #define silk_DIV32(a32, b32) ((opus_int32)((a32) / (b32))) argument
[all …]
/external/llvm/test/CodeGen/NVPTX/
Denvreg.ll40 ; CHECK: mov.b32 %r{{[0-9]+}}, %envreg0
42 ; CHECK: mov.b32 %r{{[0-9]+}}, %envreg1
44 ; CHECK: mov.b32 %r{{[0-9]+}}, %envreg2
46 ; CHECK: mov.b32 %r{{[0-9]+}}, %envreg3
48 ; CHECK: mov.b32 %r{{[0-9]+}}, %envreg4
50 ; CHECK: mov.b32 %r{{[0-9]+}}, %envreg5
52 ; CHECK: mov.b32 %r{{[0-9]+}}, %envreg6
54 ; CHECK: mov.b32 %r{{[0-9]+}}, %envreg7
56 ; CHECK: mov.b32 %r{{[0-9]+}}, %envreg8
58 ; CHECK: mov.b32 %r{{[0-9]+}}, %envreg9
[all …]
Drotate.ll5 declare i32 @llvm.nvvm.rotate.b32(i32, i32)
12 ; SM20: shl.b32
14 ; SM20: shr.b32
16 ; SM35: shf.l.wrap.b32
17 %val = tail call i32 @llvm.nvvm.rotate.b32(i32 %a, i32 %b)
28 ; SM35: shf.l.wrap.b32
29 ; SM35: shf.l.wrap.b32
41 ; SM35: shf.r.wrap.b32
42 ; SM35: shf.r.wrap.b32
50 ; SM20: shl.b32
[all …]
Dtexsurf-queries.ll19 ; SM20: txq.width.b32
20 ; SM30: txq.width.b32
30 ; SM20: txq.width.b32 %r{{[0-9]+}}, [tex0]
31 ; SM30: txq.width.b32 %r{{[0-9]+}}, [%rd[[HANDLE:[0-9]+]]]
40 ; SM20: txq.height.b32
41 ; SM30: txq.height.b32
51 ; SM20: txq.height.b32 %r{{[0-9]+}}, [tex0]
52 ; SM30: txq.height.b32 %r{{[0-9]+}}, [%rd[[HANDLE:[0-9]+]]]
61 ; SM20: suq.width.b32
62 ; SM30: suq.width.b32
[all …]
Dshfl.ll18 ; CHECK: shfl.down.b32 [[OUT:%r[0-9]+]], [[IN]], 1, 2;
56 ; CHECK: shfl.down.b32 [[OUT:%f[0-9]+]], [[IN]], 5, 6;
65 ; CHECK: shfl.up.b32 %r{{[0-9]+}}, %r{{[0-9]+}}, 1, 2;
69 ; CHECK: shfl.up.b32 %f{{[0-9]+}}, %f{{[0-9]+}}, 3, 4;
73 ; CHECK: shfl.bfly.b32 %r{{[0-9]+}}, %r{{[0-9]+}}, 5, 6;
77 ; CHECK: shfl.bfly.b32 %f{{[0-9]+}}, %f{{[0-9]+}}, 7, 8;
81 ; CHECK: shfl.idx.b32 %r{{[0-9]+}}, %r{{[0-9]+}}, 9, 10;
85 ; CHECK: shfl.idx.b32 %f{{[0-9]+}}, %f{{[0-9]+}}, 11, 12;
Dcttz.ll11 ; CHECK: popc.b32
17 ; CHECK: popc.b32
30 ; CHECK: popc.b32
36 ; CHECK: popc.b32
Dctlz.ll10 ; CHECK: clz.b32
16 ; CHECK: clz.b32
29 ; CHECK: clz.b32
35 ; CHECK: clz.b32
Di8-param.ll5 ; CHECK: .visible .func (.param .b32 func_retval0) callee
9 ; CHECK: st.param.b32
18 ; CHECK: ld.param.b32
Dconvert-int-sm20.ll12 ; CHECK: st.param.b32 [func_retval{{[0-9]+}}+0], %r[[R0]]
20 ; CHECK: st.param.b32 [func_retval{{[0-9]+}}+0], %r[[R0]]
32 ; CHECK: st.param.b32 [func_retval{{[0-9]+}}+0], %r[[R0]]
40 ; CHECK: st.param.b32 [func_retval{{[0-9]+}}+0], %r[[R0]]
Dsurf-write-cuda.ll14 ; SM20: sust.b.1d.b32.trap [%rd[[SURFREG]], {%r{{[0-9]+}}}], {%r{{[0-9]+}}}
16 ; SM30: sust.b.1d.b32.trap [%rd[[SURFREG]], {%r{{[0-9]+}}}], {%r{{[0-9]+}}}
31 ; SM20: sust.b.1d.b32.trap [surf0, {%r{{[0-9]+}}}], {%r{{[0-9]+}}}
32 ; SM30: sust.b.1d.b32.trap [%rd[[SURFREG]], {%r{{[0-9]+}}}], {%r{{[0-9]+}}}
Dsurf-read-cuda.ll14 ; SM20: suld.b.1d.b32.trap {%r[[RED:[0-9]+]]}, [%rd[[SURFREG]], {%r{{[0-9]+}}}]
16 ; SM30: suld.b.1d.b32.trap {%r[[RED:[0-9]+]]}, [%rd[[SURFREG]], {%r{{[0-9]+}}}]
34 ; SM20: suld.b.1d.b32.trap {%r[[RED:[0-9]+]]}, [surf0, {%r{{[0-9]+}}}]
35 ; SM30: suld.b.1d.b32.trap {%r[[RED:[0-9]+]]}, [%rd[[SURFHANDLE]], {%r{{[0-9]+}}}]
Dmodule-inline-asm.ll5 ; CHECK: .global .b32 val;
6 module asm ".global .b32 val;"
Dinline-asm.ll13 ; CHECK: selp.b32 %r{{[0-9]+}}, %r{{[0-9]+}}, %r{{[0-9]+}}, %p{{[0-9]+}}
14 %0 = tail call i32 asm "selp.b32 $0, $1, $2, $3;", "=r,r,r,b"(i32 %a, i32 %b, i1 %cond)
Dctpop.ll6 ; CHECK: popc.b32
12 ; CHECK: popc.b32
/external/webrtc/webrtc/common_audio/signal_processing/
Dsignal_processing_unittest.cc96 int32_t b32 = -1711; in TEST_F() local
108 EXPECT_EQ(4, WebRtcSpl_NormW16(b32)); in TEST_F()
122 EXPECT_EQ(109410, WebRtcSpl_AddSatW32(a32, b32)); in TEST_F()
123 EXPECT_EQ(112832, WebRtcSpl_SubSatW32(a32, b32)); in TEST_F()
126 b32 = 0x80000000; in TEST_F()
128 EXPECT_EQ(static_cast<int>(0x80000000), WebRtcSpl_AddSatW32(a32, b32)); in TEST_F()
130 b32 = 0x7fffffff; in TEST_F()
131 EXPECT_EQ(0x7fffffff, WebRtcSpl_AddSatW32(a32, b32)); in TEST_F()
133 b32 = 0x80000000; in TEST_F()
134 EXPECT_EQ(0x7fffffff, WebRtcSpl_SubSatW32(a32, b32)); in TEST_F()
[all …]
/external/swiftshader/third_party/LLVM/test/CodeGen/PTX/
Dparameter-order.ll3 …c (.reg .b32 %ret{{[0-9]+}}) test_parameter_order (.reg .b32 %param{{[0-9]+}}, .reg .b32 %param{{[…
Dshl.ll4 ; CHECK: shl.b32 %ret{{[0-9]+}}, %r{{[0-9]+}}, %r{{[0-9]+}}
11 ; CHECK: shl.b32 %ret{{[0-9]+}}, %r{{[0-9]+}}, 3
18 ; CHECK: shl.b32 %ret{{[0-9]+}}, 3, %r{{[0-9]+}}
/external/llvm/test/Transforms/NaryReassociate/NVPTX/
Dnary-slsr.ll24 ; PTX: st.param.b32 [param0+0], [[abc:%r[0-9]+]];
33 ; PTX: st.param.b32 [param0+0], [[ab2c]];
42 ; PTX: st.param.b32 [param0+0], [[ab3c]];
/external/e2fsprogs/lib/ext2fs/
Ddblist.c364 struct ext2_db_entry a32, b32; in dir_block_cmp() local
369 b32.ino = db_b->ino; b32.blk = db_b->blk; in dir_block_cmp()
370 b32.blockcnt = db_b->blockcnt; in dir_block_cmp()
372 return sortfunc32(&a32, &b32); in dir_block_cmp()
/external/libopus/silk/mips/
Dmacros_mipsr1.h47 #define silk_SMLAWB(a32, b32, c32) ((a32) + silk_SMULWB(b32, c32)) argument
/external/llvm/lib/Target/NVPTX/
DNVPTXIntrinsics.td68 // shfl.{up,down,bfly,idx}.b32
77 !strconcat("shfl.", mode, ".b32 $dst, $src, $offset, $mask;"),
83 !strconcat("shfl.", mode, ".b32 $dst, $src, $offset, $mask;"),
89 !strconcat("shfl.", mode, ".b32 $dst, $src, $offset, $mask;"),
95 !strconcat("shfl.", mode, ".b32 $dst, $src, $offset, $mask;"),
190 def INT_NVVM_CLZ_I : F_MATH_1<"clz.b32 \t$dst, $src0;", Int32Regs, Int32Regs,
195 def INT_NVVM_POPC_I : F_MATH_1<"popc.b32 \t$dst, $src0;", Int32Regs, Int32Regs,
200 def INT_NVVM_PRMT : F_MATH_3<"prmt.b32 \t$dst, $src0, $src1, $src2;", Int32Regs,
327 def INT_NVVM_BREV32 : F_MATH_1<"brev.b32 \t$dst, $src0;", Int32Regs, Int32Regs,
707 !strconcat(".reg .b32 %temp; \n\t",
[all …]

123