Searched refs:bank_swizzle (Results 1 – 9 of 9) sorted by relevance
| /external/mesa3d/src/gallium/drivers/r600/ |
| D | r700_asm.c | 60 S_SQ_ALU_WORD1_BANK_SWIZZLE(alu->bank_swizzle); in r700_bytecode_alu_build()
71 S_SQ_ALU_WORD1_BANK_SWIZZLE(alu->bank_swizzle) | in r700_bytecode_alu_build()
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| D | r600_asm.c | 735 struct alu_bank_swizzle *bs, int bank_swizzle) in check_vector() argument
744 cycle = cycle_for_bank_swizzle_vec[bank_swizzle][src]; in check_vector()
765 struct alu_bank_swizzle *bs, int bank_swizzle) in check_scalar() argument
791 cycle = cycle_for_bank_swizzle_scl[bank_swizzle][src]; in check_scalar()
802 cycle = cycle_for_bank_swizzle_scl[bank_swizzle][src]; in check_scalar()
814 int bank_swizzle[5]; in check_and_set_bank_swizzle() local
822 slots[i]->bank_swizzle = slots[i]->bank_swizzle_force; in check_and_set_bank_swizzle()
838 bank_swizzle[i] = SQ_ALU_VEC_012; in check_and_set_bank_swizzle()
840 bank_swizzle[i] = slots[i]->bank_swizzle; in check_and_set_bank_swizzle()
842 bank_swizzle[4] = SQ_ALU_SCL_210; in check_and_set_bank_swizzle()
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| D | r600_asm.h | 59 unsigned bank_swizzle; member
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| D | r600_shader.c | 316 alu.bank_swizzle = bytes[bytes_read++]; in r600_alu_from_byte_stream()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | R600InstrFormats.td | 107 bits<3> bank_swizzle;
114 let Word1{20-18} = bank_swizzle;
165 bits<3> bank_swizzle;
173 let Word1{20-18} = bank_swizzle;
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| D | R600Packetizer.cpp | 306 AMDGPU::OpName::bank_swizzle); in addToPacket()
310 TII->getOperandIdx(MI.getOpcode(), AMDGPU::OpName::bank_swizzle); in addToPacket()
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| D | EvergreenInstructions.td | 415 let bank_swizzle = 0;
465 BANK_SWIZZLE:$bank_swizzle),
487 BANK_SWIZZLE:$bank_swizzle),
519 LAST:$last, R600_Pred:$pred_sel, BANK_SWIZZLE:$bank_swizzle),
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| D | R600Instructions.td | 99 BANK_SWIZZLE:$bank_swizzle),
103 "$pred_sel $bank_swizzle"),
142 BANK_SWIZZLE:$bank_swizzle),
147 "$pred_sel $bank_swizzle"),
183 BANK_SWIZZLE:$bank_swizzle),
189 "$bank_swizzle"),
440 let bank_swizzle = 5;
444 let bank_swizzle = 5;
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| D | R600InstrInfo.cpp | 558 AMDGPU::OpName::bank_swizzle); in fitsReadPortLimitations()
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