| /external/llvm/test/MC/Disassembler/Mips/mips32r6/ |
| D | valid-mips32r6-el.txt | 28 0x40 0x00 0x43 0x18 # CHECK: bgeuc $2, $3, 260
29 0xfa 0xff 0x43 0x18 # CHECK: bgeuc $2, $3, -20
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| D | valid-mips32r6.txt | 44 0x18 0x43 0x00 0x40 # CHECK: bgeuc $2, $3, 260
45 0x18 0x43 0xff 0xfa # CHECK: bgeuc $2, $3, -20
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| /external/llvm/test/MC/Disassembler/Mips/mips64r6/ |
| D | valid-mips64r6-el.txt | 26 0x40 0x00 0x43 0x18 # CHECK: bgeuc $2, $3, 260
27 0xfa 0xff 0x43 0x18 # CHECK: bgeuc $2, $3, -20
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| D | valid-mips64r6.txt | 61 0x18 0x43 0x00 0x40 # CHECK: bgeuc $2, $3, 260
62 0x18 0x43 0xff 0xfa # CHECK: bgeuc $2, $3, -20
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| /external/v8/src/mips/ |
| D | assembler-mips.h | 616 void bgeuc(Register rs, Register rt, int16_t offset);
617 inline void bgeuc(Register rs, Register rt, Label* L) { in bgeuc() function
618 bgeuc(rs, rt, shifted_branch_offset(L)); in bgeuc()
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| D | macro-assembler-mips.cc | 3069 bgeuc(rs, scratch, offset); in BranchShortHelperR6()
3117 bgeuc(scratch, rs, offset); in BranchShortHelperR6()
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| D | assembler-mips.cc | 1305 void Assembler::bgeuc(Register rs, Register rt, int16_t offset) { in bgeuc() function in v8::internal::Assembler
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| /external/v8/src/mips64/ |
| D | assembler-mips64.h | 623 void bgeuc(Register rs, Register rt, int16_t offset);
624 inline void bgeuc(Register rs, Register rt, Label* L) { in bgeuc() function
625 bgeuc(rs, rt, shifted_branch_offset(L)); in bgeuc()
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| D | macro-assembler-mips64.cc | 3255 bgeuc(rs, scratch, offset); in BranchShortHelperR6()
3303 bgeuc(scratch, rs, offset); in BranchShortHelperR6()
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| D | assembler-mips64.cc | 1291 void Assembler::bgeuc(Register rs, Register rt, int16_t offset) { in bgeuc() function in v8::internal::Assembler
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| /external/llvm/test/MC/Mips/micromips32r6/ |
| D | valid.s | 25 bgeuc $3,$4, 16 # CHECK: bgeuc $3, $4, 16 # encoding: [0xc0,0x83,0x00,0x08]
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| /external/llvm/test/MC/Disassembler/Mips/micromips32r6/ |
| D | valid.txt | 44 0xc0 0x83 0x00 0x08 # CHECK: bgeuc $3, $4, 16
|
| /external/llvm/lib/Target/Mips/ |
| D | MicroMips32r6InstrInfo.td | 60 class BGEUC_MMR6_ENC : CMP_BRANCH_2R_OFF16_FM_MMR6<"bgeuc", 0b110000>,
282 class BGEUC_MMR6_DESC : CMP_CBR_2R_MMR6_DESC_BASE<"bgeuc", brtarget_mm,
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| D | Mips32r6InstrInfo.td | 396 class BGEUC_DESC : CMP_BC_DESC_BASE<"bgeuc", brtarget, GPR32Opnd>;
|