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Searched refs:blend1 (Results 1 – 7 of 7) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i965/
Dgen6_cc.c93 blend[b].blend1.logic_op_enable = 1; in gen6_upload_blend_state()
94 blend[b].blend1.logic_op_func = in gen6_upload_blend_state()
144 blend[b].blend1.pre_blend_clamp_enable = 1; in gen6_upload_blend_state()
145 blend[b].blend1.post_blend_clamp_enable = 1; in gen6_upload_blend_state()
146 blend[b].blend1.clamp_range = BRW_RENDERTARGET_CLAMPRANGE_FORMAT; in gen6_upload_blend_state()
150 blend[b].blend1.alpha_test_enable = 1; in gen6_upload_blend_state()
151 blend[b].blend1.alpha_test_func = in gen6_upload_blend_state()
158 blend[b].blend1.dither_enable = 1; in gen6_upload_blend_state()
159 blend[b].blend1.y_dither_offset = 0; in gen6_upload_blend_state()
160 blend[b].blend1.x_dither_offset = 0; in gen6_upload_blend_state()
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Dgen6_blorp.cpp302 blend->blend1.pre_blend_clamp_enable = 1; in gen6_blorp_emit_blend_state()
303 blend->blend1.post_blend_clamp_enable = 1; in gen6_blorp_emit_blend_state()
304 blend->blend1.clamp_range = BRW_RENDERTARGET_CLAMPRANGE_FORMAT; in gen6_blorp_emit_blend_state()
306 blend->blend1.write_disable_r = false; in gen6_blorp_emit_blend_state()
307 blend->blend1.write_disable_g = false; in gen6_blorp_emit_blend_state()
308 blend->blend1.write_disable_b = false; in gen6_blorp_emit_blend_state()
309 blend->blend1.write_disable_a = false; in gen6_blorp_emit_blend_state()
Dbrw_structs.h248 } blend1; member
/external/llvm/test/CodeGen/X86/
D2012-07-15-vshl.ll28 …%blend1.i583 = call <8 x float> @llvm.x86.avx.blendv.ps.256(<8 x float> undef, <8 x float> undef, …
/external/eigen/Eigen/src/Core/arch/AVX512/
DPacketMath.h726 __m256 blend1 = _mm256_blend_ps(sum1, sum2, 0xcc);
729 __m256 final = _mm256_blend_ps(blend1, blend2, 0xf0);
751 blend1 = _mm256_blend_ps(sum1, sum2, 0xcc);
754 final = padd(final, _mm256_blend_ps(blend1, blend2, 0xf0));
776 blend1 = _mm256_blend_ps(sum1, sum2, 0xcc);
779 __m256 final_1 = _mm256_blend_ps(blend1, blend2, 0xf0);
801 blend1 = _mm256_blend_ps(sum1, sum2, 0xcc);
804 final_1 = padd(final_1, _mm256_blend_ps(blend1, blend2, 0xf0));
/external/eigen/Eigen/src/Core/arch/AVX/
DPacketMath.h377 __m256 blend1 = _mm256_blend_ps(sum1, sum2, 0xcc);
380 __m256 final = _mm256_blend_ps(blend1, blend2, 0xf0);
/external/llvm/test/Transforms/InstCombine/
Dx86-pshufb.ll69 define <16 x i8> @blend1(<16 x i8> %InVec) {
70 ; CHECK-LABEL: @blend1(