| /external/llvm/test/MC/Disassembler/Mips/mips32r6/ |
| D | valid-mips32r6-el.txt | 48 0x40 0x00 0xa6 0x5c # CHECK: bltc $5, $6, 260
49 0xfa 0xff 0xa6 0x5c # CHECK: bltc $5, $6, -20
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| D | valid-mips32r6.txt | 164 0x5c 0xa6 0x00 0x40 # CHECK: bltc $5, $6, 260
165 0x5c 0xa6 0xff 0xfa # CHECK: bltc $5, $6, -20
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| /external/llvm/test/MC/Disassembler/Mips/mips64r6/ |
| D | valid-mips64r6-el.txt | 41 0x40 0x00 0xa6 0x5c # CHECK: bltc $5, $6, 260
42 0xfa 0xff 0xa6 0x5c # CHECK: bltc $5, $6, -20
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| D | valid-mips64r6.txt | 183 0x5c 0xa6 0x00 0x40 # CHECK: bltc $5, $6, 260
184 0x5c 0xa6 0xff 0xfa # CHECK: bltc $5, $6, -20
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| /external/v8/src/mips/ |
| D | assembler-mips.h | 652 void bltc(Register rs, Register rt, int16_t offset);
653 inline void bltc(Register rs, Register rt, Label* L) { in bltc() function
654 bltc(rs, rt, shifted_branch_offset(L)); in bltc()
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| D | macro-assembler-mips.cc | 2938 bltc(scratch, rs, offset); in BranchShortHelperR6()
2989 bltc(rs, scratch, offset); in BranchShortHelperR6()
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| D | assembler-mips.cc | 1377 void Assembler::bltc(Register rs, Register rt, int16_t offset) { in bltc() function in v8::internal::Assembler
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| /external/v8/src/mips64/ |
| D | assembler-mips64.h | 659 void bltc(Register rs, Register rt, int16_t offset);
660 inline void bltc(Register rs, Register rt, Label* L) { in bltc() function
661 bltc(rs, rt, shifted_branch_offset(L)); in bltc()
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| D | macro-assembler-mips64.cc | 3124 bltc(scratch, rs, offset); in BranchShortHelperR6()
3175 bltc(rs, scratch, offset); in BranchShortHelperR6()
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| D | assembler-mips64.cc | 1363 void Assembler::bltc(Register rs, Register rt, int16_t offset) { in bltc() function in v8::internal::Assembler
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| /external/llvm/test/MC/Mips/micromips32r6/ |
| D | valid.s | 26 bltc $3,$4, 16 # CHECK: bltc $3, $4, 16 # encoding: [0xc4,0x83,0x00,0x08]
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| /external/llvm/test/MC/Disassembler/Mips/micromips32r6/ |
| D | valid.txt | 45 0xc4 0x83 0x00 0x08 # CHECK: bltc $3, $4, 16
|
| /external/llvm/lib/Target/Mips/ |
| D | MicroMips32r6InstrInfo.td | 62 class BLTC_MMR6_ENC : CMP_BRANCH_2R_OFF16_FM_MMR6<"bltc", 0b110001>;
284 class BLTC_MMR6_DESC : CMP_CBR_2R_MMR6_DESC_BASE<"bltc", brtarget_mm,
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| D | Mips32r6InstrInfo.td | 400 class BLTC_DESC : CMP_BC_DESC_BASE<"bltc", brtarget, GPR32Opnd>;
|