| /external/llvm/test/MC/Disassembler/Mips/mips32r6/ |
| D | valid-xfail-mips32r6.txt | 13 0x60 0xc0 0x00 0x40 # CHECK: bnec $6, $zero, 256
14 0x60 0xa0 0x00 0x40 # CHECK: bnec $5, $zero, 256
15 0x60 0xa6 0x00 0x40 # CHECK: bnec $5, $6, 256
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| D | valid-mips32r6-el.txt | 22 0x40 0x00 0xa6 0x60 # CHECK: bnec $5, $6, 260
23 0xfa 0xff 0x43 0x60 # CHECK: bnec $2, $3, -20
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| D | valid-mips32r6.txt | 171 0x60 0xa6 0x00 0x40 # CHECK: bnec $5, $6, 260
172 0x60 0x43 0xff 0xfa # CHECK: bnec $2, $3, -20
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r6/ |
| D | valid-xfail-mips64r6.txt | 13 0x60 0xc0 0x00 0x40 # CHECK: bnec $6, $zero, 260
14 0x60 0xa0 0x00 0x40 # CHECK: bnec $5, $zero, 260
15 0x60 0xa6 0x00 0x40 # CHECK: bnec $5, $6, 260
|
| D | valid-mips64r6-el.txt | 49 0x40 0x00 0xa6 0x60 # CHECK: bnec $5, $6, 260
50 0xfa 0xff 0x43 0x60 # CHECK: bnec $2, $3, -20
|
| D | valid-mips64r6.txt | 190 0x60 0xa6 0x00 0x40 # CHECK: bnec $5, $6, 260
191 0x60 0x43 0xff 0xfa # CHECK: bnec $2, $3, -20
|
| /external/llvm/test/CodeGen/Mips/compactbranches/ |
| D | beqc-bnec-register-constraint.ll | 3 ; beqc/bnec have the constraint that $rs < $rt && $rs != 0 && $rt != 0
12 ; may simplify out the crucical bnec $4, $4 instruction.
35 ; CHECK-NOT: bnec $[[R0:[0-9]+]], $[[R0]]
|
| D | no-beqzc-bnezc.ll | 37 ; beqc and bnec have the restriction that $rs < $rt.
42 ; ENCODING-NOT: bnec $5, $4
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| D | compact-branches.ll | 12 ; CHECK: bnec
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| D | relocations.s | 14 # CHECK-FIXUP: bnec $5, $6, bar # encoding: [0x60,0xa6,A,A]
62 bnec $5, $6, bar
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| D | relocations.s | 14 # CHECK-FIXUP: bnec $5, $6, bar # encoding: [0x60,0xa6,A,A]
67 bnec $5, $6, bar
|
| /external/llvm/test/CodeGen/Mips/ |
| D | atomic.ll | 111 ; MIPSR6: bnec $2, $4, $[[BB1:[A-Z_0-9]+]]
330 ; MIPSR6: bnec $[[R14]], $[[R10]], $[[BB1:[A-Z_0-9]+]]
374 ; MIPSR6: bnec $[[R14]], $[[R10]], $[[BB1:[A-Z_0-9]+]]
|
| /external/v8/src/mips/ |
| D | assembler-mips.h | 685 void bnec(Register rs, Register rt, int16_t offset);
686 inline void bnec(Register rs, Register rt, Label* L) { in bnec() function
687 bnec(rs, rt, shifted_branch_offset(L)); in bnec()
|
| D | assembler-mips.cc | 1501 void Assembler::bnec(Register rs, Register rt, int16_t offset) { in bnec() function in v8::internal::Assembler
|
| D | macro-assembler-mips.cc | 2912 bnec(rs, scratch, offset); in BranchShortHelperR6()
|
| /external/v8/src/mips64/ |
| D | assembler-mips64.h | 692 void bnec(Register rs, Register rt, int16_t offset);
693 inline void bnec(Register rs, Register rt, Label* L) { in bnec() function
694 bnec(rs, rt, shifted_branch_offset(L)); in bnec()
|
| D | assembler-mips64.cc | 1487 void Assembler::bnec(Register rs, Register rt, int16_t offset) { in bnec() function in v8::internal::Assembler
|
| D | macro-assembler-mips64.cc | 3098 bnec(rs, scratch, offset); in BranchShortHelperR6()
|
| /external/llvm/test/MC/Mips/micromips32r6/ |
| D | valid.s | 28 bnec $3,$4, 16 # CHECK: bnec $3, $4, 16 # encoding: [0x7c,0x83,0x00,0x08]
|
| /external/llvm/test/MC/Disassembler/Mips/micromips32r6/ |
| D | valid.txt | 47 0x7c 0x83 0x00 0x08 # CHECK: bnec $3, $4, 16
|
| /external/llvm/lib/Target/Mips/ |
| D | MicroMips32r6InstrInfo.td | 66 class BNEC_MMR6_ENC : CMP_BRANCH_2R_OFF16_FM_MMR6<"bnec", 0b011111>;
290 class BNEC_MMR6_DESC : CMP_CBR_2R_MMR6_DESC_BASE<"bnec", brtarget_mm,
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| D | Mips32r6InstrInfo.td | 398 class BNEC_DESC : CMP_BC_DESC_BASE<"bnec", brtarget, GPR32Opnd>;
|